LAN9311-NZW Standard Microsystem (Smsc), LAN9311-NZW Datasheet - Page 48

• Manufacturer Part Number: LAN9311-NZW
• Description: Ethernet Switch 2-Port 10Mbps/100Mbps 128-Pin XVTQFP
• Manufacturer: Standard Microsystem (Smsc)

Specifications of LAN9311-NZW

• Package: 128XVTQFP
• Phy/transceiver Interface: MII
• Number Of Primary Switch Ports: 2
• Maximum Data Rate: 100 Mbps
• Internal Memory Buffer Size: 32 KB
• Vlan Support: Yes
• Power Supply Type: Analog
• Minimum Single Supply Voltage: 3 V
• Maximum Single Supply Voltage: 3.6 V
• Maximum Supply Current: 0.295 A
• Maximum Power Dissipation: 1070 mW

Revision 1.7 (06-29-10)
4.3.2
The Port 1 & 2 PHY energy-detect events are capable of asserting the PME output by additionally
setting the PME_EN and ED_EN2 (Port 2 PHY) or ED_EN1 (Port 1 PHY) bits of the
Management Control Register
Host MAC Power Management
The Host MAC provides wake-up frame and magic packet detection modes. When enabled in the
MAC Wake-up Control and Status Register (HMAC_WUCSR)
and the MPEN bit for magic packets), detection of wake-up frames or magic packets causes the WUFR
and MPR bits of the HMAC_WUCSR register to set, respectively. If either of the WUFR and MPR bits
are set, the WOL_STS bit of the
events can enable PME output assertion by additionally setting the PME_EN bit of the
Management Control Register
The IRQ interrupt output can be triggered by a wake-up frame or magic packet as described in
5.2.6, "Power Management Interrupts," on page
Refer to
Detection," on page 119
Section 9.5, "Wake-up Frame Detection," on page 117
for additional details on these features.
(PMT_CTRL).
(PMT_CTRL).
Power Management Control Register (PMT_CTRL)
DATASHEET
48
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
53.
(via the WUEN bit for wake-up frames,
and
Section 9.5.1, "Magic Packet
SMSC LAN9311/LAN9311i
will be set. These
Datasheet
Section
Power
Power
Host