LAN9311-NZW Standard Microsystem (Smsc), LAN9311-NZW Datasheet - Page 271

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LAN9311-NZW

Manufacturer Part Number
LAN9311-NZW
Description
Ethernet Switch 2-Port 10Mbps/100Mbps 128-Pin XVTQFP
Manufacturer
Standard Microsystem (Smsc)
Datasheet

Specifications of LAN9311-NZW

Package
128XVTQFP
Phy/transceiver Interface
MII
Number Of Primary Switch Ports
2
Maximum Data Rate
100 Mbps
Internal Memory Buffer Size
32 KB
Vlan Support
Yes
Power Supply Type
Analog
Minimum Single Supply Voltage
3 V
Maximum Single Supply Voltage
3.6 V
Maximum Supply Current
0.295 A
Maximum Power Dissipation
1070 mW

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Part Number:
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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.3
INDEX #
0Dh-FFh
0Ch
0Ah
0Bh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
This section details the Host MAC System CSR’s. These registers are located in the Host MAC and
are accessed indirectly via the HBI system CSR’s.
accessible through the indexing method using the
(MAC_CSR_CMD)
The Host MAC registers allow configuration of the various Host MAC parameters including the Host
MAC address, flow control, multicast hash table, and wake-up configuration. The Host MAC CSR’s
also provide serial access to the PHYs via the registers HMAC_MII_ACC and HMAC_MII_DATA.
These registers allow access to the 10/100 Ethernet PHY registers and the switch engine (via Port 0).
Host MAC Control and Status Registers
HMAC_MII_DATA
HMAC_MII_ACC
HMAC_WUCSR
HMAC_ADDRH
HMAC_HASHH
HMAC_ADDRL
HMAC_HASHL
HMAC_VLAN1
HMAC_VLAN2
HMAC_FLOW
HMAC_WUFF
RESERVED
RESERVED
HMAC_CR
SYMBOL
and
Table 14.6 Host MAC Adressable Registers
Host MAC CSR Interface Data Register
DATASHEET
Host MAC Control Register,
Host MAC Address High Register,
Host MAC Multicast Hash Table High Register,
Host MAC Multicast Hash Table Low Register,
Host MAC MII Data Register,
Host MAC Flow Control Register,
Host MAC VLAN1 Tag Register,
Host MAC VLAN2 Tag Register,
Host MAC Wake-up Frame Filter Register,
Section 14.3.12
Reserved for Future Use
Reserved for Future Use
Host MAC Address Low Register,
Host MAC MII Access Register,
Host MAC Wake-up Control and Status Register,
271
Host MAC CSR Interface Command Register
Table 14.6
REGISTER NAME
(MAC_CSR_DATA).
Section 14.3.1
lists Host MAC registers that are
Section 14.3.7
Section 14.3.6
Section 14.3.9
Section 14.3.10
Section 14.3.8
Section 14.3.3
Section 14.3.2
Section 14.3.11
Revision 1.7 (06-29-10)
Section 14.3.5
Section 14.3.4

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