S9S12XS128J1MAL Freescale Semiconductor, S9S12XS128J1MAL Datasheet - Page 96

• Manufacturer Part Number: S9S12XS128J1MAL
• Description: IC MCU 16BIT 128KB FLSH 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS128J1MAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
1
Port Integration Module (S12XSPIMV1)
2.3.33
2.3.34
96
Function
Address 0x024F
Address 0x0250
Read: Always reads 0x00
Write: Unimplemented
Read: Anytime. The data source depends on the data direction value.
Write: Anytime.
Altern.
Field
PTM
PTM
Reset
Reset
7-6
5
W
W
R
R
Port M general purpose input/output data—Data Register
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port M general purpose input/output data—Data Register, routed SPI0 SCK input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SPI0 function takes precedence over the general purpose I/O function if enabled.
PTM7
PIM Reserved Register
Port M Data Register (PTM)
—
—
0
0
0
7
7
= Unimplemented or Reserved
PTM6
—
—
0
0
0
6
6
Table 2-30. PTM Register Field Descriptions
Figure 2-32. Port M Data Register (PTM)
S12XS Family Reference Manual, Rev. 1.11
Figure 2-31. PIM Reserved Register
(SCK0)
PTM5
—
0
0
0
5
5
(MOSI0)
PTM4
—
0
0
0
4
4
Description
u = Unaffected by reset
PTM3
(SS0)
—
3
0
0
3
0
(MISO0)
PTM2
—
0
0
0
2
2
TXCAN0
Freescale Semiconductor
(TXD1)
Access: User read/write
PTM1
0
0
0
1
1
Access: User read
RXCAN0
(RXD1)
PTM0
0
0
0
0
0
1
1