S9S12XS128J1MAL Freescale Semiconductor, S9S12XS128J1MAL Datasheet - Page 238

• Manufacturer Part Number: S9S12XS128J1MAL
• Description: IC MCU 16BIT 128KB FLSH 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS128J1MAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

S12XE Clocks and Reset Generator (S12XECRGV1)
8.3
This section provides a detailed description of all registers accessible in the S12XECRG.
8.3.1
Figure 8-2
238
2. FORBYP and CTCTL are intended for factory test purposes only.
Address
0x000A
0x000B
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
FORBYP
Memory Map and Registers
POSTDIV
ARMCOP
CRGFLG
COPCTL
CRGINT
CLKSEL
PLLCTL
CTCTL
RTICTL
REFDV
gives an overview on all S12XECRG registers.
SYNR
Name
Module Memory Map
Register Address = Base Address + Address Offset, where the Base Address
is defined at the MCU level and the Address Offset is defined at the module
level.
2
2
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
PLLSEL
RTDEC
WCOP
RTIE
Bit 7
RTIF
CME
Bit 7
VCOFRQ[1:0]
REFFRQ[1:0]
0
0
0
0
= Unimplemented or Reserved
S12XS Family Reference Manual, Rev. 1.11
RSBCK
PLLON
Figure 8-2. CRG Register Summary
PORF
PSTP
RTR6
Bit 6
6
0
0
0
0
0
WRTMASK
XCLKS
RTR5
LVRF
FM1
Bit 5
5
0
0
0
0
0
0
NOTE
LOCKIF
LOCKIE
RTR4
FM0
Bit 4
4
0
0
0
0
0
FSTWKP
PLLWAI
LOCK
RTR3
Bit 3
3
0
0
0
0
0
SYNDIV[5:0]
REFDIV[5:0]
POSTDIV[4:0]
RTR2
ILAF
PRE
CR2
Bit 2
2
0
0
0
0
0
Freescale Semiconductor
RTIWAI
SCMIF
SCMIE
RTR1
PCE
CR1
Bit 1
1
0
0
0
COPWAI
SCME
RTR0
Bit 0
SCM
CR0
Bit 0
0
0
0
0