S9S12XS128J1MAL Freescale Semiconductor, S9S12XS128J1MAL Datasheet - Page 641

• Manufacturer Part Number: S9S12XS128J1MAL
• Description: IC MCU 16BIT 128KB FLSH 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS128J1MAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Upon clearing CCIF to launch the Erase Verify All Blocks command, the Memory Controller will verify
that the entire Flash memory space is erased. The CCIF flag will set after the Erase Verify All Blocks
operation has completed.
20.4.2.2
The Erase Verify Block command allows the user to verify that an entire P-Flash or D-Flash block has been
erased. The FCCOB upper global address bits determine which block must be verified.
Upon clearing CCIF to launch the Erase Verify Block command, the Memory Controller will verify that
the selected P-Flash or D-Flash block is erased. The CCIF flag will set after the Erase Verify Block
operation has completed.
20.4.2.3
The Erase Verify P-Flash Section command will verify that a section of code in the P-Flash memory is
erased. The Erase Verify P-Flash Section command defines the starting point of the code to be verified and
the number of phrases. The section to be verified cannot cross a 128 Kbyte boundary in the P-Flash
memory space.
Freescale Semiconductor
1
1
2
As found in the memory map for FTMR128K1.
As defined by the memory map for FTMR128K1.
As found in the memory map for FTMR128K1.
Register
Register
FSTAT
FSTAT
Erase Verify Block Command
Erase Verify P-Flash Section Command
Table 20-33. Erase Verify Block Command FCCOB Requirements
CCOBIX[2:0]
MGSTAT1
MGSTAT0
MGSTAT1
MGSTAT0
Table 20-32. Erase Verify All Blocks Command Error Handling
ACCERR
ACCERR
Error Bit
Error Bit
FPVIOL
FPVIOL
Table 20-34. Erase Verify Block Command Error Handling
000
S12XS Family Reference Manual, Rev. 1.11
Set if CCOBIX[2:0] != 000 at command launch
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
Set if CCOBIX[2:0] != 000 at command launch
Set if an invalid global address [22:16] is supplied
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
0x02
FCCOB Parameters
Global address [22:16] of the
Error Condition
Error Condition
Flash block to be verified
64 KByte Flash Module (S12XFTMR64K1V1)
1
1
2
.
1
2
641