S9S12XS128J1MAL Freescale Semiconductor, S9S12XS128J1MAL Datasheet - Page 692

• Manufacturer Part Number: S9S12XS128J1MAL
• Description: IC MCU 16BIT 128KB FLSH 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS128J1MAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Characteristics
For N < 1000, the following equation is a good fit for the maximum jitter:
1
2
3
692
Conditions are shown in
Num C
10
11
12
Bus frequency is equivalent to f
% deviation from target frequency
f
1
2
3
4
5
7
8
9
OSC
=4MHz, f
P Self Clock Mode frequency
D Lock Detection
D Un-Lock Detection
C Time to lock
C Jitter fit parameter 1
C Jitter fit parameter 2
C Bus Frequency for FM1=1, FM0=1 (frequency
C Bus Frequency for FM1=1, FM0=0 (frequency
C Bus Frequency for FM1=0, FM0=1 (frequency
T VCO locking range
T Reference Clock
modulation in PLLCTL register of s12xe_crg)
modulation in PLLCTL register of s12xe_crg)
modulation in PLLCTL register of s12xe_crg)
BUS
On timers and serial modules a prescaler will eliminate the effect of the jitter
to a large extent.
=40MHz equivalent f
Table A-4
J(N)
3
3
Figure A-5. Maximum bus clock jitter approximation
SCM
unless otherwise noted
Rating
1
/2
1
PLL
S12XS Family Reference Manual, Rev. 1.11
=80MHz: REFDIV=$00, REFRQ=01, SYNDIV=$09, VCOFRQ=01, POSTDIV=$00
Table A-24. IPLL Characteristics
5
J N
( )
10
=
NOTE
------- -
j
1
N
+
j
Symbol
2
|∆
f
f
|∆
f
t
SCM
f
f
f
VCO
REF
Lock
lock
bus
bus
bus
j
j
unl
1
2
|
|
20
Min
0.5
32
—
—
—
—
—
—
1
1
0
N
Typ
214
—
—
—
—
—
—
—
—
—
—
Freescale Semiconductor
256/f
150 +
Max
120
1.5
2.5
1.2
40
38
39
39
4
0
REF
MHz
MHz
MHz
MHz
MHz
MHz
Unit
%
%
µs
%
%
2
2