Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 125

• Manufacturer Part Number: Z32AN00NW200SG
• Description: IC ARM922T MCU 200MHZ 256-BGA
• Manufacturer: Zilog
• Series: Encore!® 32r

Specifications of Z32AN00NW200SG

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
• Peripherals: DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• For Use With: 269-4713 - KIT DEV ENCORE 32 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 269-4717

Z32AN Series Data Sheet
15.5.2 Offset 004h: LCD_RD – LCD Read Register
15.5.3 Offset 008h: LCD_WR – LCD Write Register
DS0200-003
31:10
07:00
31:10
07:00
Bits
Bits
09
08
09
08
Type
Type
RW
RW
RW
RW
RW
RO
RO
RO
Reset
Reset
00h
00h
0
0
0
0
0
0
Description
Reserved
Read Command (READ_CMD): When written to ‘1’, initiates a read cycle. This is
cleared automatically once the read cycle is completed. While read as ‘1’, a read is not
yet complete.
State (LCD_RS):
executed.
LCD Data (LCD_DATA): Data resulting from the read cycle is left in this register.
Description
Reserved
Write Command (WR_CMD):
Cleared automatically on write completion. If both read and write commands are active,
the read takes precedence. When read as ‘1’, a write command is pending.
LCD_RS State (LCD_RS): When cleared, drive logic 0 on LCD_RS pin during write.
When set, drive logic 1 on LCD_RS pin during write.
LCD Data (LCD_DATA): Data to appear on the LCD_D[7:0] pins during the write
cycle.
When set, drive a ‘1’ on LCD_RS pin when the read cycle is
When written to ‘1’, activates a write command.
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