UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 732

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UPD78F0550MA-FAA-AX

Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0550MA-FAA-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
732
CHAPTER 20 RESET FUNCTION
p. 613
CHAPTER 21 POWER-ON-CLEAR CIRCUIT
p. 619
CHAPTER 22 LOW-VOLTAGE DETECTOR
p. 625
p. 626
p. 631
p. 637
CHAPTER 23 REGULATOR
p. 644
CHAPTER 24 OPTION BYTE
p. 646
p. 649
p. 650
CHAPTER 25 FLASH MEMORY
p. 654
p. 654
p. 655
p. 661
CHAPTER 26 ON-CHIP DEBUG FUNCTION
pp. 664, 665
CHAPTER 28 ELECTRICAL SPECIFICATIONS (TARGET VALUES)
p. 681
p. 685
p. 685
pp. 690, 691
pp. 699, 700
Remark “Classification” in the above table classifies revisions as follows.
Page
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note,
(d): Addition/change of package, part number, or management division, (e): Addition/change of related
documents
Addition of 8-bit A/D conversion result register L (ADCRL) to Table 20-2 Hardware Statuses
After Reset Acknowledgment (3/4)
Addition of Note 5 to Figure 21-2 Timing of Generation of Internal Reset Signal by Power-on-
Clear Circuit and Low-Voltage Detector (2/2)
Modification of Note 4 in Figure 22-2 Format of Low-Voltage Detection Register (LVIM)
Modification of Figure 22-3 Format of Low-Voltage Detection Level Select Register (LVIS),
modification of Note 1
Modification of description in 22.4.1 (1) (b) When LVI default start function enabled is set
(LVISTART = 1)
Modification of description in 22.4.2 (1) (b) When LVI default start function enabled is set
(LVISTART = 1)
Modification of Cautions 1 and 3 in Figure 23-1 Format of Regulator Mode Control Register
(RMC)
Modification of Caution in 24.1 (2) 0081H/1081H
Modification of Note 1 in Figure 24-1 Format of Option Byte (2/3)
Modification of Caution 2 in Figure 24-1 Format of Option Byte (3/3)
Addition of Note to Figure 25-2 Environment for Writing Program to Flash Memory
Addition of Note to Table 25-2 Pin Connection
Modification of 25.4.2 TOOLD0 and TOOLD1 pins
Modification of Caution 3 and Remark in 25.7 Flash Memory Programming by Self-
Programming
Revision of Figure 26-1 Connection Example of QB-MINI2 and 78K0/Kx2-L Microcontrollers
Modification of A/D converter pins in (2) Non-port functions
Modification of oscillation frequency (f
Modification of oscillation clock frequency (f
Characteristics
(1) A/D Converter in Analog Characteristics
DC Characteristics
Deletion of pull-down resistor (R
Modification of supply current (I
Modification of real-time counter operating current (I
converter operating current (I
Addition of reset current (I
Modification of conversion time (t
Addition of <2> ANI8 to ANI10 (78K0/KB2-L and 78K0/KC2-L only)
When starting operation
When starting operation
DDrst
Preliminary User’s Manual U19111EJ2V1UD
APPENDIX C REVISION HISTORY
ADC
)
DD1
PLD1
), and operational amplifier operating current (I
CONV
, I
IH
)
DD2
) in Internal High-speed Oscillator Characteristics
) in <1> ANI0 to ANI7
, I
DD3
IL
Description
= 30 kHz) in Internal Low-speed Oscillator
)
RTC
), TMH1 operating current (I
AMP
)
TMH
), A/D
Classification
(a, c)
(b, c)
(b)
(a)
(b)
(b)
(b)
(b)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(4/5)

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