UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 235

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.4.3 External event counter operation
up with the valid edge of the TI000 pin) and bits 3 and 2 (TMC003 and TMC002) of 16-bit timer mode control register
00 (TMC00) are set to 11, the valid edge of an external event input is counted, and a match interrupt signal indicating
matching between TM00 and CR000 (INTTM000) is generated.
external event counter in the clear & start mode entered by the TI000 pin valid edge input (when TMC003 and
TMC002 = 10).
the following timing.
is not detected until it is detected two times in a row. Therefore, a noise with a short pulse width can be eliminated.
TI000 pin
When bits 1 and 0 (PRM001 and PRM000) of the prescaler mode register 00 (PRM00) are set to 11 (for counting
To input the external event, the TI000 pin is used. Therefore, the timer/event counter cannot be used as an
The INTTM000 signal is generated with the following timing.
However, the first match interrupt immediately after the timer/event counter has started operating is generated with
To detect the valid edge, the signal input to the TI000 pin is sampled during the clock cycle of f
Remarks 1. For the setting of I/O pins, refer to 6.3 (5) Port mode register 0 (PM0).
Timing of generation of INTTM000 signal (second time or later)
= Number of times of detection of valid edge of external event
Timing of generation of INTTM000 signal (first time only)
= Number of times of detection of valid edge of external event input
2. For how to enable the INTTM000 signal interrupt, refer to CHAPTER 17 INTERRUPT FUNCTIONS.
detection
Edge
f
PRS
TMC003, TMC002
Operable bits
Figure 6-19. Block Diagram of External Event Counter Operation
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
Preliminary User’s Manual U19111EJ2V1UD
16-bit counter (TM00)
CR000 register
Clear
Match signal
(Set value of CR000 + 1)
(Set value of CR000 + 2)
controller
INTTM000 signal
Output
TO00 output
PRS
. The valid edge
TO00 pin
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