UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 193
UPD78F0550MA-FAA-AX
Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet
1.UPD78F0550MA-FAA-AX.pdf
(734 pages)
Specifications of UPD78F0550MA-FAA-AX
Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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5.6 Controlling Clock
5.6.1 Example of controlling high-speed system clock
pins.
Notes 1.
Cautions 1. A voltage oscillation stabilization time is required after the supply voltage reaches 1.61 V
Remark While the microcontroller is operating, a clock that is not used as the CPU clock can be stopped via
The following two types of high-speed system clocks are available.
When the high-speed system clock is not used, the X1/P121 and X2/EXCLK/P122 pins can be used as input port
Caution The X1/P121 and X2/EXCLK/P122 pins are in the input port mode after a reset release.
The following describes examples of setting procedures for the following cases.
(1) When oscillating X1 clock
(2) When using external main system clock
(3) When using high-speed system clock as CPU clock and peripheral hardware clock
(4) When stopping high-speed system clock
X1 clock:
External main system clock: External clock is input to the EXCLK pin.
2.
3.
software settings.
stopped by executing the STOP instruction (refer to (4) in 5.6.1 Example of controlling high-speed
system clock, (3) in 5.6.2 Example of controlling internal high-speed oscillation clock, and (4) in
5.6.3 Example of controlling subsystem clock).
2. It is not necessary to wait for the oscillation stabilization time when an external clock input
The internal reset processing time includes the oscillation accuracy stabilization time of the internal
high-speed oscillation clock.
When releasing a reset (above figure) or releasing STOP mode while the CPU is operating on the
internal high-speed oscillation clock, confirm the oscillation stabilization time for the X1 clock using the
oscillation stabilization time counter status register (OSTC). If the CPU operates on the high-speed
system clock (X1 oscillation), set the oscillation stabilization time when releasing STOP mode using the
oscillation stabilization time select register (OSTS).
78K0/KC2-L only
(TYP.). If the supply voltage rises from 1.61 V (TYP.) to 1.91 V (TYP.) within the power supply
oscillation stabilization time, the power supply oscillation stabilization time is automatically
generated before reset processing.
from the EXCLK and EXCLKS pins is used.
Crystal/ceramic resonator is connected across the X1 and X2 pins.
The internal high-speed oscillation clock and high-speed system clock can be
Preliminary User’s Manual U19111EJ2V1UD
CHAPTER 5 CLOCK GENERATOR
193
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