UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 381
UPD78F0550MA-FAA-AX
Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet
1.UPD78F0550MA-FAA-AX.pdf
(734 pages)
Specifications of UPD78F0550MA-FAA-AX
Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Manufacturer
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Price
Company:
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
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Quantity:
20 000
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(7) Port mode registers 1, 2 (PM1, PM2)
Cautions 1. Set the pin set to analog input to the input mode by using port mode register 1 (PM1).
When using the ANI8/AMP1-/P10 to ANI10/AMP1+/P12 and ANI0/AMP0-/P20 to ANI7/P27 pins for analog input
port, set PM10 to PM12 and PM20 to PM27 to 1. The output latches of P10 to P12 and P20 to P27 at this time
may be 0 or 1.
If PM10 to PM12 and PM20 to PM27 are set to 0, they cannot be used as analog input port pins.
PM1 and PM2 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to FFH.
Remark A/D converter analog input pins differ depending on products.
Address: FF2FH
Symbol
ADPC1
Symbol
Address: FF21H
PM1
2. If data is written to ADPC1, a wait cycle is generated. Do not write data to ADPC1 when the
78K0/KY2-L:
78K0/KA2-L:
78K0/KB2-L:
78K0/KC2-L:
peripheral hardware clock is stopped. For details, refer to CHAPTER 31 CAUTIONS FOR
WAIT.
ADPCSn
PM17
PM1n
7
0
0
1
Figure 12-10. Format of A/D Port Configuration Register 1 (ADPC1)
7
After reset: 07H
0
1
After reset: FFH
Analog input
Digital I/O
Output mode (output buffer on)
Input mode (output buffer off)
Figure 12-11. Format of Port Mode Register 1 (PM1)
ANI0 to ANI3
ANI0 to ANI5
ANI0 to ANI3, ANI8 to ANI10
ANI0 to ANI10
PM16
6
0
6
(78K0/KB2-L and 78K0/KC2-L Only)
R/W
Preliminary User’s Manual U19111EJ2V1UD
CHAPTER 12 A/D CONVERTER
PM15
5
5
0
R/W
Digital I/O or analog input selection (n = 8 to 10)
P1n pin I/O mode selection (n = 0 to 7)
PM14
4
4
0
PM13
3
3
0
PM12
ADPCS10
2
2
PM11
1
ADPCS9
1
PM10
0
ADPCS8
0
381
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