UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 213
UPD78F0550MA-FAA-AX
Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet
1.UPD78F0550MA-FAA-AX.pdf
(734 pages)
Specifications of UPD78F0550MA-FAA-AX
Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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5.6.10 Peripheral hardware and source clocks
Peripheral Hardware
16-bit timer/event counter 00
8-bit timer/
event counter
8-bit timer
Real-time counter
Watchdog timer
Clock output
A/D converter
Serial interface
The following lists peripheral hardware and source clocks incorporated in the 78K0/Kx2-L microcontrollers.
Remark The peripheral hardware depends on the product. Refer to 1.4 Block Diagram and 1.5 Outline of
Notes 1. 78K0/KC2-L only
Remark Y: Can be selected, N: Cannot be selected
2. Do not start the peripheral hardware operation with the external clock from peripheral hardware pins
Functions.
Source Clock
when the internal high-speed oscillation clock and high-speed system clock are stopped while the CPU
operates with the subsystem clock, or when in the STOP mode.
50
51
H0
H1
UART6
CSI10
CSI11
IICA
Hardware Clock
Table 5-13. Peripheral Hardware and Source Clocks
Peripheral
(f
PRS
Y
Y
Y
Y
Y
N
N
Y
Y
Y
Y
Y
Y
)
Preliminary User’s Manual U19111EJ2V1UD
CHAPTER 5 CLOCK GENERATOR
Subsystem Clock
(f
SUB
N
N
N
N
N
Y
N
Y
N
N
N
N
N
)
Note 1
Speed Oscillation
Internal Low-
Clock (f
N
N
N
N
Y
N
Y
N
N
N
N
N
N
IL
)
TM50 Output
N
N
N
Y
N
N
N
N
N
Y
N
N
N
Y (SCK10 pin)
Y (SCK11 pin)
Y (SCLA0 pin)
Y (TI000 pin)
from Peripheral
Y (TI50 pin)
Y (TI51 pin)
Hardware Pins
External Clock
N
N
N
N
N
N
N
Note 2
Note 2
Note 2
213
Note 2
Note 2
Note 2
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