UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 551
UPD78F0550MA-FAA-AX
Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet
1.UPD78F0550MA-FAA-AX.pdf
(734 pages)
Specifications of UPD78F0550MA-FAA-AX
Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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17.1 Interrupt Function Types
(1) Maskable interrupts
(2) Software interrupt
17.2 Interrupt Sources and Configuration
reset sources (refer to Table 17-1).
Maskable
interrupts
The following two types of interrupt functions are used.
The interrupt sources consist of maskable interrupts and software interrupts. In addition, they also have up to four
These interrupts undergo mask control. Maskable interrupts can be divided into a high interrupt priority group
and a low interrupt priority group by setting the priority specification flag registers (PR0L, PR0H, PR1L, PR1H).
Multiple interrupt servicing can be applied to low-priority interrupts when high-priority interrupts are generated. If
two or more interrupt requests, each having the same priority, are simultaneously generated, then they are
processed according to the priority of vectored interrupt servicing. For the priority order, refer to Table 17-1.
A standby release signal is generated and STOP and HALT modes are released.
External interrupt requests and internal interrupt requests are provided as maskable interrupts.
This is a vectored interrupt generated by executing the BRK instruction. It is acknowledged even when interrupts
are disabled. The software interrupt does not undergo interrupt priority control.
Item
External 2
Internal
10
( PD78F055x)
78K0/KY2-L
16 pins
CHAPTER 17 INTERRUPT FUNCTIONS
4
10
( PD78F056x)
Preliminary User’s Manual U19111EJ2V1UD
78K0/KA2-L
20 pins
8
13
( PD78F057x)
78K0/KB2-L
30 pins
10
17
44 pins
( PD78F058x)
78K0/KC2-L
12
48 pins
551
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