UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 233
UPD78F0550MA-FAA-AX
Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet
1.UPD78F0550MA-FAA-AX.pdf
(734 pages)
Specifications of UPD78F0550MA-FAA-AX
Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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(a) 16-bit timer mode control register 00 (TMC00)
(b) Capture/compare control register 00 (CRC00)
(c) 16-bit timer output control register 00 (TOC00)
(d) Prescaler mode register 00 (PRM00)
(e) 16-bit timer counter 00 (TM00)
(f) 16-bit capture/compare register 000 (CR000)
(g) 16-bit capture/compare register 010 (CR010)
ES110
0
0
0
0
By reading TM00, the count value can be read.
If M is set to CR000, the interval time is as follows.
Setting CR000 to 0000H is prohibited.
Usually, CR010 is not used for the square-wave output function. However, a compare match interrupt
(INTTM010) is generated when the set value of CR010 matches the value of TM00.
Therefore, mask the interrupt request by using the interrupt mask flag (TMMK010).
Square wave frequency = 1 / [2
OSPT00
ES100
Figure 6-17. Example of Register Settings for Square-Wave Output Operation
0
0
0
0
OSPE00
ES010
0
0
0
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
TOC004
ES000
0
0
0
0
Preliminary User’s Manual U19111EJ2V1UD
TMC003 TMC002 TMC001
(M + 1)
LVS00
1
0
0/1
3
0
CRC002 CRC001 CRC000
Count clock cycle]
LVR00
1
0
0/1
2
0
TOC001
PRM001 PRM000
0
0
0/1
1
OVF00
0
0
TOE00
0/1
1
Clears and starts on match
between TM00 and CR000.
CR000 used as
compare register
Enables TO00 output.
Inverts TO00 output on match
between TM00 and CR000.
Specifies initial value of TO00 output F/F
Selects count clock
233
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