UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 216

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UPD78F0550MA-FAA-AX

Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0550MA-FAA-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
(1) 16-bit timer counter 00 (TM00)
216
Cautions 1. The valid edge of TI010 and timer output (TO00) cannot be used for the P01 pin at the same
TM00 is a 16-bit read-only register that counts count pulses.
The counter is incremented in synchronization with the rising edge of the count clock.
The count value of TM00 can be read by reading TM00 when the value of bits 3 and 2 (TMC003 and TMC002) of
16-bit timer mode control register 00 (TMC00) is other than 00. The value of TM00 is 0000H if it is read when
TMC003 and TMC002 = 00.
The count value is reset to 0000H in the following cases.
Caution
At reset signal generation
If TMC003 and TMC002 are cleared to 00
If the valid edge of the TI000 pin is input in the mode in which the clear & start occurs when inputting the valid
edge to the TI000 pin
If TM00 and CR000 match in the mode in which the clear & start occurs when TM00 and CR000 match
OSPT00 is set to 1 in one-shot pulse output mode or the valid edge is input to the TI000 pin
Address: FF10H, FF11H
TM00
2. If clearing of bits 3 and 2 (TMC003 and TMC002) of 16-bit timer mode control register 00
3. To change the mode from the capture mode to the comparison mode, first clear the TMC003
Even if TM00 is read, the value is not captured by CR010.
time. Select either of the functions.
(TMC00) to 00 and input of the capture trigger conflict, then the captured data is undefined.
and TMC002 bits to 00, and then change the setting.
A value that has been once captured remains stored in CR000 unless the device is reset. If
the mode has been changed to the comparison mode, be sure to set a comparison value.
15
14
Figure 6-2. Format of 16-Bit Timer Counter 00 (TM00)
13
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
12
After reset: 0000H
FF11H
Preliminary User’s Manual U19111EJ2V1UD
11
10
9
R
8
7
6
5
FF10H
4
3
2
1
0

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