UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 299

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.4.2 Operation as external event counter
counter 5n (TM5n).
Either the rising or falling edge can be selected.
and an interrupt request signal (INTTM5n) is generated.
The external event counter counts the number of external clock pulses to be input to the TI5n pin by 8-bit timer
TM5n is incremented each time the valid edge specified by timer clock selection register 5n (TCL5n) is input.
When the TM5n count value matches the value of 8-bit timer compare register 5n (CR5n), TM5n is cleared to 0
Whenever the TM5n value matches the value of CR5n, INTTM5n is generated.
<1> Set each register.
<2> When TCE5n = 1 is set, the number of pulses input from the TI5n pin is counted.
<3> When the values of TM5n and CR5n match, INTTM5n is generated (TM5n is cleared to 00H).
<4> After these settings, INTTM5n is generated each time the values of TM5n and CR5n match.
Note 8-bit timer/event counter 50: PM17
Remark For how to enable the INTTM5n signal interrupt, refer to CHAPTER 17 INTERRUPT FUNCTIONS.
Remarks 1. N = 00H to FFH
Setting
TM5n count value
8-bit timer/event counter 51: PM30 (78K0/KY2-L, 78K0/KA2-L)
INTTM5n
Set the port mode register (PM17, PM30, or PM33)
TCL5n: Select TI5n pin input edge.
CR5n:
TMC5n: Stop the count operation, select the mode in which clear & start occurs on match of TM5n and
2. 78K0/KY2-L, 78K0/KA2-L: n = 1
Figure 7-13. External Event Counter Operation Timing (with Rising Edge Specified)
CR5n
TI5n
78K0/KB2-L, 78K0/KC2-L: n = 0, 1
TI5n pin falling edge
TI5n pin rising edge
Compare value
CR5n, disable the timer F/F inversion operation, disable timer output.
(TMC5n = 00000000B)
Count start
00H
CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51
01H
02H
PM33 (78K0/KB2-L, 78K0/KC2-L)
Preliminary User’s Manual U19111EJ2V1UD
TCL5n = 01H
03H
TCL5n = 00H
04H
05H
Note
to 1.
N
1
N
N
00H
01H
02H
03H
299