UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 326

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

326
Cautions 1. Do not rewrite the NRZB1 bit again until at least the second clock after it has been rewritten,
Remark INTTM5H1 is an internal signal and not an interrupt source.
<1> The INTTM51 signal is synchronized with the count clock of the 8-bit timer H1 and is output as the
<2> The value of the NRZB1 bit is transferred to the NRZ1 bit at the second clock from the rising edge of the
<3> Write the next value to the NRZB1 bit in the interrupt servicing program that has been started by the
To control the carrier pulse output during a count operation, the NRZ1 and NRZB1 bits of the TMCYC1 register
have a master and slave bit configuration. The NRZ1 bit is read-only but the NRZB1 bit can be read and written.
The INTTM51 signal is synchronized with the 8-bit timer H1 count clock and is output as the INTTM5H1 signal.
The INTTM5H1 signal becomes the data transfer signal of the NRZ1 bit, and the NRZB1 bit value is transferred to
the NRZ1 bit. The timing for transfer from the NRZB1 bit to the NRZ1 bit is as shown below.
INTTM5H1 signal.
INTTM5H1 signal.
INTTM5H1 interrupt or after timing has been checked by polling the interrupt request flag. Write data to
count the next time to the CR51 register.
2. When the 8-bit timer/event counter 51 is used in the carrier generator mode, an interrupt is
or else the transfer from the NRZB1 bit to the NRZ1 bit is not guaranteed.
generated at the timing of <1>. When the 8-bit timer/event counter 51 is used in a mode other
than the carrier generator mode, the timing of the interrupt generation differs.
8-bit timer H1
INTTM5H1
count clock
INTTM51
TMHE1
NRZB1
RMC1
NRZ1
CHAPTER 8 8-BIT TIMERS H0 AND H1
Preliminary User’s Manual U19111EJ2V1UD
0
Figure 8-14. Transfer Timing
<1>
1
<2>
<3>
1
0
0
1