UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 194
UPD78F0550MA-FAA-AX
Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet
1.UPD78F0550MA-FAA-AX.pdf
(734 pages)
Specifications of UPD78F0550MA-FAA-AX
Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Price
Company:
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
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(1) Example of setting procedure when oscillating the X1 clock
(2) Example of setting procedure when using the external main system clock
(3) Example of setting procedure when using high-speed system clock as CPU clock and peripheral
<1> Setting P121/X1 and P122/X2/EXCLK pins and selecting X1 clock or external clock (OSCCTL register)
<2> Controlling oscillation of X1 clock (MOC register)
<3> Waiting for the stabilization of the oscillation of X1 clock
Cautions 1. Do not change the value of EXCLK and OSCSEL while the X1 clock is operating.
<1> Setting P121/X1 and P122/X2/EXCLK pins and selecting operation mode (OSCCTL register)
<2> Controlling external main system clock input (MOC register)
Cautions 1. Do not change the value of EXCLK and OSCSEL while the external main system clock is
hardware clock
<1> Setting high-speed system clock oscillation
When EXCLK is cleared to 0 and OSCSEL is set to 1, the mode is switched from port mode to X1
oscillation mode.
If MSTOP is cleared to 0, the X1 oscillator starts oscillating.
Check the OSTC register and wait for the necessary time.
During the wait time, other software processing can be executed with the internal high-speed oscillation
clock.
When EXCLK and OSCSEL are set to 1, the mode is switched from port mode to external clock input
mode.
When MSTOP is cleared to 0, the input of the external main system clock is enabled.
(Refer to 5.6.1 (1) Example of setting procedure when oscillating the X1 clock and (2) Example of
setting procedure when using the external main system clock.)
Note The setting of <1> is not necessary when high-speed system clock is already operating.
EXCLK
EXCLK
2. Set the X1 clock after the supply voltage has reached the operable voltage of the clock to
2. Set the external main system clock after the supply voltage has reached the operable
0
1
be used (refer to CHAPTER 28 ELECTRICAL SPECIFICATIONS (TARGET VALUES)).
operating.
voltage of the clock to be used (refer to CHAPTER 28 ELECTRICAL SPECIFICATIONS
(TARGET VALUES)).
OSCSEL
OSCSEL
1
1
X1 oscillation mode
External clock input mode
Speed System Clock Pin
Speed System Clock Pin
Operation Mode of High-
Operation Mode of High-
Preliminary User’s Manual U19111EJ2V1UD
CHAPTER 5 CLOCK GENERATOR
Note
Crystal/ceramic resonator connection
Input port
P121/X1 Pin
P121/X1 Pin
External clock input
P122/X2/EXCLK Pin
P122/X2/EXCLK Pin
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