UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 425

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UPD78F0550MA-FAA-AX

Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0550MA-FAA-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
<R>
<R>
(7) Input switch control register (ISC)
(8) Port mode register 1 (PM1), port mode register 6 (PM6)
The input switch control register (ISC) is used to receive a status signal transmitted from the master during LIN
(Local Interconnect Network) reception.
The signal input from the R
set to 1 (refer to Figure 14-3 Port Configuration for LIN Reception Operation).
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Remark 78K0/KY2-L, 78K0/KA2-L: TI000/INTP0/P00, RxD6/SDAA0/P61
These registers set port 1 input/output or port 6 input/output in 1-bit units.
PM1 and PM6 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to FFH.
When using the P60/T
P60 to 1.
When using the P61/R
this time may be 0 or 1.
When using the P13/T
When using the P14/R
may be 0 or 1.
Address: FF4FH
78K0/KY2-L, 78K0/KA2-L
78K0/KB2-L, 78K0/KC2-L
Symbol
ISC
78K0/KB2-L, 78K0/KC2-L: TI000/P00, INTP0/EXLVI/P120, RxD6/P14
ISC1
ISC0
7
0
0
1
0
1
After reset: 00H
X
Figure 14-11. Format of Input Switch Control Register (ISC)
X
X
X
D6 pin for serial interface data output, clear PM13 to 0 and set the output latch of P13 to 1.
D6/SCLA0 pin for serial interface data output, clear PM60 to 0 and set the output latch of
D6 pin for serial interface data input, set PM14 to 1. The output latch of P14 at this time
D6/SDAA0 pin for serial interface data input, set PM61 to 1. The output latch of P61 at
TI000
R
INTP0
R
X
X
X
D6
D6
D6 pin is selected as the input source of INTP0 and TI000 when ISC0 and ISC1 are
6
0
CHAPTER 14 SERIAL INTERFACE UART6
R/W
Preliminary User’s Manual U19111EJ2V1UD
5
0
INTP0 input source selection
4
0
TI000 input source selection
3
0
2
0
ISC1
1
ISC0
0
425

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