UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 492

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

492
Note The wait time is calculated as follows.
Remark IICWL: IICA low-level width setting register
(IICWL setting value + IICWH setting value + 4) + t
D
IICWH: IICA high-level width setting register
t
f
F
PRS
:
:
MSTS0 = 1?
IICBSY = 0?
SDAA0 and SCLA0 signal falling times (refer to CHAPTER 28 ELECTRICAL SPECIFICATIONS
(TARGET VALUES))
Peripheral hardware clock frequency
STCF = 0?
STT0 = 1
STT0 = 1
Wait
Wait
C
C
A
B
Note
Figure 15-31. Master Operation in Multi-Master System (2/3)
Yes
Yes
Yes
Enables reserving communication.
Disables reserving communication.
Wait state after stop condition
was detected and start condition
was generated by the communication
reservation function.
No
No
No
CHAPTER 15 SERIAL INTERFACE IICA
Prepares for starting communication
(generates a start condition).
Secure wait time
Prepares for starting communication
(generates a start condition).
Preliminary User’s Manual U19111EJ2V1UD
Note
by software.
No
F
2
EXC0 = 1 or COI0 =1?
EXC0 = 1 or COI0 =1?
interrupt occurs?
interrupt occurs?
f
Slave operation
Slave operation
PRS
INTIICA0
INTIICA0
(clocks)
Yes
Yes
Yes
Yes
No
No
No
Waits for bus release
(communication being reserved).
Waits for bus release
Detects a stop condition.
D