R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 522

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 13 PCI Controller (PCIC)
• Exclusive access (target only)
• Can support cache coherency between a device connected to the PCI bus and system memory
• Supports four external interrupt inputs (INTD to INTA) in host bus bridge mode
• Supports one external interrupt output (INTA) in normal mode
• Supports both big endian and little endian formats for the SuperHyway bus (the PCI bus
• Number of devices which can be connected
The PCIC does not support the following PCI functions.
• Cache support (no SBO or SDONE pin)
• Address wrap-around mechanism
• PCI JTAG (other modules in this LSI can support the JTAG feature)
• Dual address cycles
• Interrupt acknowledge cycles
• Fast back-to-back transfer initiation (supported when performed as a target device)
• Extended ROM for initialization and system boot
Note: When the ratio of the clocks (SHwy clock : PCICLK clock) is in the ranges of (2.1 : 1) to
Rev. 2.00 May 22, 2009 Page 452 of 1982
REJ09B0256-0200
 Once locked, only accessible from the device that accessed the LOCK signal
 The SuperHyway bus in not locked during lock transfer
(PCI target) although device performance may become suboptimal
operates in the little endian format)
 33 MHz: 4 or less
 66 MHz: 1
etc.
(3.3 : 1), the PCIC cannot be used.

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