R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1051

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 23 Gigabit Ethernet Controller (GETHER)
2. Receive Descriptor Setting
• Set RDLAR.
• Set RDFAR.
• Set RDFXR.
• Set RDFFR. When the descriptor indicated by RDFXR is the last descriptor in the descriptor
list, set H'00000001.
(3)
Register Settings
The following registers should be set as necessary.
1. E-DMAC-related registers
• Set EDMR: Operating mode, etc.
• Set EESIPR: Interrupt masks
• Set TRSCER: Error masks
• Set TFTR: Transmit FIFO threshold
• Set FDR: External FIFO size
• Set RMCR: Reset method for reception activation
• Set RPADIR: Padding insertion into receive data
• Set FCFTR: Receive BSY output threshold
2. E-MAC-related registers
• Set ECMR setting: Transmission/reception specifications
• Set ECSIPR setting: Interrupt masks
• Set MAHR: MAC address
• Set MALR: MAC address
• Set RFLR: Maximum receive frame length
• Set PIPR: ET_PHY_INT pin polarity
• Set APR: TIME parameter value of an automatic pause frame
• Set MPR: TIME parameter value of a manual PAUSE frame
• Set TPAUSER: Upper limit of automatic PAUSE frame retransmission
• Set GECMR: Transfer speed
• Set BCULR: Upper limit of burst cycles
Rev. 2.00 May 22, 2009 Page 981 of 1982
REJ09B0256-0200