R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 149

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

This LSI is a 2-ILP (instruction-level-parallelism) superscalar pipelining microprocessor.
Instruction execution is pipelined, and two instructions can be executed in parallel.
4.1
Figure 4.1 shows the basic pipelines. Normally, a pipeline consists of seven stages: instruction
fetch (I1/I2), decode and register read (ID), execution (E1/E2/E3), and write-back (WB). An
instruction is executed as a combination of basic pipelines.
1. General Pipeline
2. General Load/Store Pipeline
3. Special Pipeline
4. Special Load/Store Pipeline
5. Floating-Point Pipeline
6.
Floating-Point Extended Pipeline
-Instruction fetch
-Instruction fetch
-Instruction fetch
-Instruction fetch
-Instruction fetch
-Instruction fetch
I1
I1
I1
I1
I1
I1
Pipelines
I2
I2
-Instruction
-Issue
decode
I2
I2
I2
I2
ID
-Instruction decode
-Issue
-Instruction decode
-Issue
-Register read
-Instruction decode
-Issue
-Register read
-Instruction decode
-Issue
-Register read
-Instruction decode
-Issue
-Register read
ID
-Register read
-Forwarding
Section 4 Pipelining
FE1
Figure 4.1 Basic Pipelines
ID
ID
ID
ID
-Register read
-Forwarding
-Operation
FS1
-Forwarding
-Address calculation
-Forwarding
FE2
E1
E1
E1
E1
-Operation
-Operation
FE3
FS2
-Operation
-Operation
-Memory data access
-Operation
-Operation
E2
E2
E2
E2
Rev. 2.00 May 22, 2009 Page 79 of 1982
FE4
FS3
-Operation
FE5
-Operation
E3
E3
E3
E3
FS4
-Operation
FE6
Section 4 Pipelining
REJ09B0256-0200
-Write-back
-Write-back
-Write-back
-Operation
-Write-back
-Operation
-Write-back
WB
WB
WB
WB
FS
FS