R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 317

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
25
24
23
Bit Name
IRLM0
NMIB
NMIE
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
NMI Block Mode
Selects whether an NMI interrupt is held until the BL bit
in SR is cleared to 0 or detected immediately when the
BL bit in SR of the CPU is set to 1.
0: An NMI interrupt is held when the BL bit in SR is set
1: An NMI interrupt is not held when the BL bit in SR is
Note: If interrupts are accepted with the BL bit in SR set
NMI Edge Select
Selects whether an interrupt request signal to the NMI
pin is detected at the rising edge or the falling edge.
0: An interrupt request is detected at the falling edge of
1: An interrupt request is detected at the rising edge of
IRL Pin Mode 0
Selects whether IRQ3/IRL3 to IRQ0/IRL0 are used as
the 4-bit encoded interrupt requests or as four
independent interrupts.
0: IRQ3/IRL3 to IRQ0/IRL0 are used as the 4-bit level-
1: IRQ3/IRL3 to IRQ0/IRL0 are used as four
Note: The level-encoded IRL interrupt is not detected
to 1 (initial value)
set to 1
NMI input (initial value)
NMI input
encoded interrupt requests (IRL [3:0] interrupt; initial
value)
independent interrupt requests (IRQ [n] interrupt; n
= 3 to 0)
to 1, previous exception information (SSR, SPC,
SGR, and INTEVT) is lost.
unless the pin levels sampled at every bus
clock cycle remain unchanged for four
consecutive cycles.
Rev. 2.00 May 22, 2009 Page 247 of 1982
Section 9 Interrupt Controller (INTC)
REJ09B0256-0200