R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1380

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 31 Multimedia Card Interface (MMCIF)
31.3.11 Card Status Register (CSTR)
CSTR indicates the MMCIF status during command sequence execution.
Rev. 2.00 May 22, 2009 Page 1310 of 1982
REJ09B0256-0200
Bit
7
6
5
Bit Name
BUSY
FIFO_FULL 0
FIFO_EMPTY
Initial value:
Initial
Value
0
0
R/W:
Bit:
BUSY
R
7
0
R/W
R
R
R
FIFO_
FULL
R
6
0
Description
Command Busy
Indicates command execution status. When the
CMDOFF bit in OPCR is set to 1, this bit is cleared to 0
because the MMCIF command sequence is aborted.
0: Idle state waiting for a command, or data busy state.
1: Command sequence execution in progress.
FIFO Full
This bit is set to 1 when the FIFO becomes full while
data is being received, and cleared to 0 when
RD_CONTI is set to 1 or the command sequence is
completed.
0: The FIFO is empty.
1: The FIFO is full.
FIFO Empty
This bit is set to 1 when the FIFO becomes empty while
data is being sent, and cleared to 0 when DATAEN is
set to 1 or the command sequence is completed.
Indicates whether the FIFO holds data or not.
0: The FIFO includes data.
1: The FIFO is empty.
EMPTY
FIFO_
R
5
0
CWRE
R
4
0
DTBUSY
R
3
0
DTBUSY_
—
TU
R
2
—
R
1
0
REQ
R
0
0