R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1937
R5S77631Y266BGV
Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R5S77631Y266BGV.pdf
(2056 pages)
Specifications of R5S77631Y266BGV
Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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43.4.7
Table 43.15 PCIC Signal Timing
Conditions: V
Note: When the ratio of the clocks (SHwy clock : PCICLK clock) is in the ranges of (2.1 : 1) to (3.3
Pin
PCICLK
PCIRESET
IDSEL
AD31 to AD0
CBE3 to CBE0
PAR
PCIFRAME
IRDY , TRDY
STOP, LOCK
DEVSEL
PERR
REQ0/
REQOUT
REQ3 to REQ1
GNT0/GNTIN
GNT3 to GNT1
SERR
INTA to INTD
: 1), the PCIC cannot be used.
PCIC Module Signal Timing
1.35 V, Ta = −20 to 75°C
CCQ
Item
Clock cycle
Clock pulse width (high)
Clock pulse width (low)
Clock rise time
Clock fall time
Output delay time
Input setup time
Input hold time
Output data delay time
Tri-state drive delay time
Tri-state high-impedance
delay time
Input setup time
Input hold time
Output data delay time
Tri-state drive delay time
Tri-state high-impedance
delay time
Input setup time
Input hold time
Tri-state drive delay time
Tri-state high-impedance
delay time
Input setup time
Input hold time
= VDD_RTC = AV
CC
= 3.0 to 3.6 V, V
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
t
t
t
t
t
t
t
t
t
t
PCICYC
PCIHIGH
PCILOW
PCIr
PCIf
PCIRES
PCISU
PCIH
PCIVAL
PCION
PCIOFF
PCISU
PCIH
PCIVAL
PCION
PCIOFF
PCISU
PCIH
PCION
PCIOFF
PCISU
PCIH
30
11
11
—
—
—
4
0
—
—
—
4
0
—
—
—
4
0
—
—
4
0
Min.
33 MHz
CCQ-DDR
Rev. 2.00 May 22, 2009 Page 1867 of 1982
Max.
—
—
—
4
4
14
—
—
10
10
12
—
—
10
10
12
—
—
10
12
—
—
= 2.3 to 2.7 V, VDD = 1.15 to
Section 43 Electrical Characteristics
Min.
15
6
6
—
—
—
4
0
—
—
—
4
0
—
—
—
4
0
—
—
4
0
66 MHz
Max.
30
—
—
1.5
1.5
14
—
—
10
10
12
—
—
10
10
12
—
—
10
12
—
—
REJ09B0256-0200
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Figure
43.34
43.34
43.34
43.34
43.34
—
43.36
43.36
43.35
43.35
43.35
43.36
43.36
43.35
43.35
43.35
43.36
43.36
43.35
43.35
43.36
43.36
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