HD6417032F20V Renesas Electronics America, HD6417032F20V Datasheet - Page 494

• Manufacturer Part Number: HD6417032F20V
• Description: SH1 ROMLESS LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417032F20V

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 19 Power-Down State
19.1.2
Table 19.2 summarizes the register related to the power-down state.
Table 19.2 Standby Control Register (SBYCR)
Name
Standby control register
Note: * Only the values of bits A27–A24 and A8–A0 are valid; bits A23–A9 are ignored. For details
19.2
The standby control register (SBYCR) is an 8-bit read/write register. It is used to enter standby
mode and also sets the port states in standby mode. SBYCR is initialized to H'1F by a reset.
Bit 7 Standby (SBY): SBY enables transition to standby mode. The SBY bit cannot be set to 1
while the timer enable bit (bit TME) in timer control/status register TCSR of the watchdog timer
(WDT) is set to 1. To enter standby mode, clear the TME bit to 0 to halt the WDT and then set the
SBY bit.
SBY
0
1
Bit 6 Port High-Impedance (HIZ): HIZ selects whether I/O ports remain in their previous
states during standby, or are placed in the high-impedance state when standby mode is entered.
The HIZ bit cannot be set to 1 while the TME bit is set to 1. To place the pins of the I/O ports in
high impedance, clear the TME bit to 0 before setting the HIZ bit.
HIZ
0
1
Rev. 7.00 Jan 31, 2006 page 466 of 658
REJ09B0272-0700
Bit
Initial value
Read/Write
on the register addresses, see section 8.3.5, Area Descriptions.
Register
Standby Control Register (SBYCR)
Description
Executing SLEEP instruction puts the chip into sleep mode
Executing SLEEP instruction puts the chip into standby mode
Description
Port states are maintained during standby
Ports are placed in the high-impedance state in standby
SBY
R/W
7
0
Abbreviation
SBYCR
R/W
HIZ
6
0
—
—
5
0
R/W
R/W
Initial Value Address*
H'1F
—
—
4
1
—
—
3
1
H'5FFFFBC
—
—
2
1
Access size
8, 16, 32
—
—
1
1
(Initial value)
(Initial value)
—
—
0
1