HD6417032F20V Renesas Electronics America, HD6417032F20V Datasheet - Page 369

• Manufacturer Part Number: HD6417032F20V
• Description: SH1 ROMLESS LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417032F20V

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

12.1.4
Table 12.2 summarizes the three WDT registers. They are used to select the clock, switch the
WDT mode, and control the reset signal.
Table 12.2 WDT Registers
Name
Timer control/status register
Timer counter
Reset control/status register
Notes: 1. Write by word transfer. A byte or longword write cannot be used.
12.2
12.2.1
TCNT is an eight-bit readable and writable up-counter. TCNT differs from other registers in that it
is more difficult to write. See section 12.2.4, Notes on Register Access, for details. When the timer
enable bit (TME) in the timer control/status register (TCSR) is set to 1, the timer counter starts
counting pulses of an internal clock source selected by clock select bits 2–0 (CKS2–CKS0) in
TCSR. When the value of TCNT overflows (changes from H'FF to H'00), a watchdog timer
overflow signal (WDTOVF) or interval timer interrupt (ITI) is generated, depending on the mode
selected with the WT/IT bit in TCSR. TCNT is initialized to H'00 by a reset and when the TME
bit is cleared to 0. It is not initialized in standby mode.
Bit
Initial value
Read/Write
2. Read by byte transfer. The correct value cannot be obtained by a word or longword
3. Only 0 can be written in bit 7, to clear the flag.
4. Only the values of bits A27–A24 and A8–A0 are valid; bits A23–A9 are ignored. For
Register Configuration
Register Descriptions
Timer Counter (TCNT)
read.
details on the register addresses, see section 8.3.5, Area Descriptions
R/W
7
0
Abbreviation R/W
TCSR
TCNT
RSTCSR
R/W
6
0
R/W
5
0
R/(W) *
R/W
R/(W) *
R/W
3
3
4
0
Initial
Value
H'18
H'00
H'1F
Rev. 7.00 Jan 31, 2006 page 341 of 658
R/W
Section 12 Watchdog Timer (WDT)
3
0
Write *
H'5FFFFB8
H'5FFFFBA
R/W
1
2
0
Address *
REJ09B0272-0700
R/W
Read *
H'5FFFFB8
H'5FFFFB9
H'5FFFFBB
1
0
4
2
R/W
0
0