HD6417032F20V Renesas Electronics America, HD6417032F20V Datasheet - Page 465

SH1 ROMLESS LEAD FREE

HD6417032F20V

Manufacturer Part Number
HD6417032F20V
Description
SH1 ROMLESS LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417032F20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417032F20V
Manufacturer:
TI
Quantity:
201
Part Number:
HD6417032F20V
Manufacturer:
RENESAS
Quantity:
20
Bits 1 and 0—PA0 Mode (PA0MD1 and PA0MD0): PA0MD1 and PA0MD0 select the function
of the PA0/CS4/TIOCA0 pin.
Bit 1:
PA0MD1
0
1
15.3.3
The port A I/O register (PAIOR) is a 16-bit read/write register that selects input or output for the
16 pins of port A. Bits PB15IOR–PB0IOR correspond to pins of port B. PBIOR is enabled when
the port B pins function as input/outputs (PB15–PB0), for ITU input capture and output compare
(TIOCA4, TIOCA3, TIOCA2, TIOCB4, TIOCB3, and TIOCB2), and as serial clocks (SCK1,
SCK0). For other functions, they are disabled. For port B pin functions PB15–PB0, and TIOCA4,
TIOCA3, TIOCA2, TIOCB4, TIOCB3, and TIOCB2, and SCK1/SCK0, a given pin in port B is an
output pin if its corresponding PBIOR bit is set to 1, and an input pin if the bit is cleared to 0.
PBIOR is initialized to H'0000 by a power-on reset; however, it is not initialized by a manual
reset, or in standby mode or sleep mode.
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Port B I/O Register (PBIOR)
Bit 0:
PA0MD0
0
1
0
1
PB15
R/W
R/W
PB7
IOR
IOR
15
0
7
0
Function
Input/output (PA0)
Chip select output (CS4)
ITU input capture/output compare (TIOCA0)
Reserved
PB14
R/W
R/W
PB6
IOR
IOR
14
0
6
0
PB13
R/W
R/W
PB5
IOR
IOR
13
0
5
0
PB12
R/W
R/W
PB4
IOR
IOR
12
0
4
0
Section 15 Pin Function Controller (PFC)
Rev. 7.00 Jan 31, 2006 page 437 of 658
PB11
R/W
R/W
PB3
IOR
IOR
11
0
3
0
PB10
R/W
R/W
PB2
IOR
IOR
10
0
2
0
REJ09B0272-0700
R/W
R/W
PB9
PB1
IOR
IOR
9
0
1
0
(Initial value)
R/W
R/W
PB8
PB0
IOR
IOR
8
0
0
0

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