AT91SAM7XC512-CU Atmel, AT91SAM7XC512-CU Datasheet - Page 669

• Manufacturer Part Number: AT91SAM7XC512-CU
• Description: MCU ARM 512K HS FLASH 100-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7XC512-CU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 128 KB
• Interface Type: MII, SPI, TWI
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7XC-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7XC-EK - KIT EVAL FOR AT91SAM7XC256/128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 40-21. SPI Timings
Notes:
6209F–ATARM–17-Feb-09
Symbol
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
0
1
2
3
4
5
6
7
8
9
10
11
1. 3.3V domain: V
2. t
CPMCK
Parameter
MISO Setup time before SPCK rises (master)
MISO Hold time after SPCK rises (master)
SPCK rising to MOSI Delay (master)
MISO Setup time before SPCK falls (master)
MISO Hold time after SPCK falls (master)
SPCK falling to MOSI Delay (master)
SPCK falling to MISO Delay (slave)
MOSI Setup time before SPCK rises (slave)
MOSI Hold time after SPCK rises (slave)
SPCK rising to MISO Delay (slave)
MOSI Setup time before SPCK falls (slave)
MOSI Hold time after SPCK falls (slave)
: Master Clock period in ns.
VDDIO
Figure 40-7. SPI Slave mode with (CPOL = NCPHA = 0) or (CPOL= NCPHA= 1)
Note that in SPI master mode the AT91SAM7XC512/256/128 does not sample the data (MISO)
on the opposite edge where data clocks out (MOSI) but the same edge is used as shown in
ure 40-4
SPCK
MISO
MOSI
from 3.0V to 3.6V, maximum external capacitor = 40 pF.
and
Figure
40-5.
AT91SAM7XC512/256/128 Preliminary
SPI
9
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
Conditions
SPI
10
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
SPI
28.5 + (t
26.5 + (t
11
Min
CPMCK
CPMCK
0
0
2
3
3
3
)/2
)/2
(2)
(2)
Max
28
28
2
2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Fig-
669