AT91SAM7XC512-CU Atmel, AT91SAM7XC512-CU Datasheet - Page 574

MCU ARM 512K HS FLASH 100-TFBGA

AT91SAM7XC512-CU

Manufacturer Part Number
AT91SAM7XC512-CU
Description
MCU ARM 512K HS FLASH 100-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7XC512-CU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
MII, SPI, TWI
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
62
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7XC-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7XC-EK - KIT EVAL FOR AT91SAM7XC256/128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7XC512-CU
Manufacturer:
Atmel
Quantity:
10 000
Figure 38-18. Consumer Handling
38.7.4
38.7.4.1
Figure 38-19. Mailbox Timestamp
6209F–ATARM–17-Feb-09
MTIMESTAMP
MTIMESTAMP
(CAN_MCRx)
(CAN_MSRx)
(CAN_MSRx)
TIMESTAMP
(CAN_TSTP)
CAN_MDHx)
(CAN_MSRx)
(CAN_MDLx
(CAN_MSRy)
(CAN_MR)
CAN BUS
CAN BUS
CAN_TIM
TEOF
MRDY
MTCR
MMI
CAN Controller Timing Modes
Timestamping Mode
Using the free running 16-bit internal timer, the CAN controller can be set in one of the two fol-
lowing timing modes:
Timestamping Mode is enabled by clearing the TTM bit in the CAN_MR register. Time Triggered
Mode is enabled by setting the TTM bit in the CAN_MR register.
Each mailbox has its own timestamp value. Each time a message is sent or received by a mail-
box, the 16-bit value MTIMESTAMP of the CAN_TIMESTP register is transferred to the LSB bits
of the CAN_MSRx register. The value read in the CAN_MSRx register corresponds to the inter-
nal timer value at the Start Of Frame or the End Of Frame of the message handled by the
mailbox.
Remote Frame
Timestamp 1
• Timestamping Mode: The value of the internal timer is captured at each Start Of Frame or
• Time Triggered Mode: The mailbox transfer operation is triggered when the internal timer
Timestamp 1
Message 1
each End Of Frame.
reaches the mailbox trigger.
Start of Frame
Message x
AT91SAM7XC512/256/128 Preliminary
End of Frame
Message x
Remote Frame
Message 2
Message y
Timestamp 2
Timestamp 2
Message y
574

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