AT91SAM7XC512-CU Atmel, AT91SAM7XC512-CU Datasheet - Page 49

MCU ARM 512K HS FLASH 100-TFBGA

AT91SAM7XC512-CU

Manufacturer Part Number
AT91SAM7XC512-CU
Description
MCU ARM 512K HS FLASH 100-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7XC512-CU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
MII, SPI, TWI
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
62
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7XC-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7XC-EK - KIT EVAL FOR AT91SAM7XC256/128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7XC512-CU
Manufacturer:
Atmel
Quantity:
10 000
12. Debug and Test Features
12.1
12.2
Figure 12-1. Debug and Test Block Diagram
6209F–ATARM–17-Feb-09
Description
Block Diagram
PDC
Boundary
ARM7TDMI
TAP
The AT91SAM7XC Series features a number of complementary debug and test capabilities. A
common JTAG/ICE (In-Circuit Emulator) port is used for standard debugging functions, such as
downloading code and single-stepping through programs. The Debug Unit provides a two-pin
UART that can be used to upload an application into internal SRAM. It manages the interrupt
handling of the internal COMMTX and COMMRX signals that trace the activity of the Debug
Communication Channel.
A set of dedicated debug and test input/output pins gives direct access to these capabilities from
a PC-based test environment.
DBGU
ICE
ICE/JTAG
AT91SAM7XC512/256/128 Preliminary
TAP
Reset
and
Test
POR
TMS
TCK
TDI
JTAGSEL
TDO
DTXD
DRXD
TST
49

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