AT91SAM7XC512-CU Atmel, AT91SAM7XC512-CU Datasheet - Page 647
![MCU ARM 512K HS FLASH 100-TFBGA](/photos/6/89/68968/313-100-cbga_sml.jpg)
AT91SAM7XC512-CU
Manufacturer Part Number
AT91SAM7XC512-CU
Description
MCU ARM 512K HS FLASH 100-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7XC512-CU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
MII, SPI, TWI
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
62
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7XC-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7XC-EK - KIT EVAL FOR AT91SAM7XC256/128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (11Mb)
39.5.26.7
Register Name:
Access Type:
• ALE: Alignment Errors
An 8-bit register counting frames that are not an integral number of bytes long and have bad CRC when their length is trun-
cated to an integral number of bytes and are between 64 and 1518 bytes in length (1536 if bit 8 set in network configuration
register). This register is also incremented if a symbol error is detected and the frame is of valid length and does not have
an integral number of bytes.
39.5.26.8
Register Name:
Access Type:
• DTF: Deferred Transmission Frames
A 16-bit register counting the number of frames experiencing deferral due to carrier sense being active on their first attempt
at transmission. Frames involved in any collision are not counted nor are frames that experienced a transmit underrun.
6209F–ATARM–17-Feb-09
31
23
15
31
23
15
–
–
–
7
–
–
7
Alignment Errors Register
Deferred Transmission Frames Register
30
22
14
30
22
14
EMAC_ALE
EMAC_DTF
–
–
–
6
–
–
6
Read-write
Read-write
29
21
13
29
21
13
–
–
–
5
–
–
5
AT91SAM7XC512/256/128 Preliminary
28
20
12
28
20
12
–
–
–
4
–
–
4
DTF
DTF
ALE
27
19
11
27
19
11
–
–
–
3
–
–
3
26
18
10
26
18
10
–
–
–
2
–
–
2
25
17
25
17
–
–
9
–
1
–
–
9
1
24
16
24
16
–
–
8
–
0
–
–
8
0
647
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