ATMEGA16-16PU Atmel, ATMEGA16-16PU Datasheet - Page 81

IC AVR MCU 16K 16MHZ 5V 40DIP

ATMEGA16-16PU

Manufacturer Part Number
ATMEGA16-16PU
Description
IC AVR MCU 16K 16MHZ 5V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA16-16PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
TWI/SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
ATMEGA16x
Core
AVR8
Data Ram Size
1 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
16 MIPS
Eeprom Memory
512 Bytes
Input Output
32
Interface
JTAG/SPI/UART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PDIP
Programmable Memory
16K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
4.5-5.5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA16-16PU
Manufacturer:
Atmel
Quantity:
140
8-bit Timer/Counter
Register Description
Timer/Counter Control
Register – TCCR0
2466J–AVR–10/04
• Bit 7 – FOC0: Force Output Compare
The FOC0 bit is only active when the WGM00 bit specifies a non-PWM mode. However,
for ensuring compatibility with future devices, this bit must be set to zero when TCCR0 is
written when operating in PWM mode. When writing a logical one to the FOC0 bit, an
immediate compare match is forced on the Waveform Generation unit. The OC0 output
is changed according to its COM01:0 bits setting. Note that the FOC0 bit is implemented
as a strobe. Therefore it is the value present in the COM01:0 bits that determines the
effect of the forced compare.
A FOC0 strobe will not generate any interrupt, nor will it clear the timer in CTC mode
using OCR0 as TOP.
The FOC0 bit is always read as zero.
• Bit 6, 3 – WGM01:0: Waveform Generation Mode
These bits control the counting sequence of the counter, the source for the maximum
(TOP) counter value, and what type of Waveform Generation to be used. Modes of
operation supported by the Timer/Counter unit are: Normal mode, Clear Timer on Com-
pare Match (CTC) mode, and two types of Pulse Width Modulation (PWM) modes. See
Table 38 and “Modes of Operation” on page 74.
Table 38. Waveform Generation Mode Bit Description
Note:
• Bit 5:4 – COM01:0: Compare Match Output Mode
These bits control the Output Compare pin (OC0) behavior. If one or both of the
COM01:0 bits are set, the OC0 output overrides the normal port functionality of the I/O
pin it is connected to. However, note that the Data Direction Register (DDR) bit corre-
sponding to the OC0 pin must be set in order to enable the output driver.
Bit
Read/Write
Initial Value
Mode
0
1
2
3
1. The CTC0 and PWM0 bit definition names are now obsolete. Use the WGM01:0 def-
WGM01
(CTC0)
initions. However, the functionality and location of these bits are compatible with
previous versions of the timer.
0
0
1
1
FOC0
W
7
0
WGM00
(PWM0)
WGM00
R/W
0
1
0
1
6
0
COM01
Timer/Counter Mode
of Operation
Normal
PWM, Phase Correct
CTC
Fast PWM
R/W
5
0
COM00
R/W
4
0
WGM01
R/W
3
0
TOP
0xFF
0xFF
OCR0
0xFF
(1)
CS02
R/W
2
0
ATmega16(L)
Update of
OCR0
Immediate
TOP
Immediate
TOP
CS01
R/W
1
0
CS00
R/W
0
0
TOV0 Flag
Set-on
MAX
BOTTOM
MAX
MAX
TCCR0
81

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