ATMEGA16-16PU Atmel, ATMEGA16-16PU Datasheet - Page 184

IC AVR MCU 16K 16MHZ 5V 40DIP

ATMEGA16-16PU

Manufacturer Part Number
ATMEGA16-16PU
Description
IC AVR MCU 16K 16MHZ 5V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA16-16PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
TWI/SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
ATMEGA16x
Core
AVR8
Data Ram Size
1 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
16 MIPS
Eeprom Memory
512 Bytes
Input Output
32
Interface
JTAG/SPI/UART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PDIP
Programmable Memory
16K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
4.5-5.5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA16-16PU
Manufacturer:
Atmel
Quantity:
140
Transmission Modes
Master Transmitter Mode
184
ATmega16(L)
The TWI can operate in one of four major modes. These are named Master Transmitter
(MT), Master Receiver (MR), Slave Transmitter (ST) and Slave Receiver (SR). Several
of these modes can be used in the same application. As an example, the TWI can use
MT mode to write data into a TWI EEPROM, MR mode to read the data back from the
EEPROM. If other Masters are present in the system, some of these might transmit data
to the TWI, and then SR mode would be used. It is the application software that decides
which modes are legal.
The following sections describe each of these modes. Possible status codes are
described along with figures detailing data transmission in each of the modes. These fig-
ures contain the following abbreviations:
S: START condition
Rs: REPEATED START condition
R: Read bit (high level at SDA)
W: Write bit (low level at SDA)
A: Acknowledge bit (low level at SDA)
A: Not acknowledge bit (high level at SDA)
Data: 8-bit data byte
P: STOP condition
SLA: Slave Address
In Figure 87 to Figure 93, circles are used to indicate that the TWINT Flag is set. The
numbers in the circles show the status code held in TWSR, with the prescaler bits
masked to zero. At these points, actions must be taken by the application to continue or
complete the TWI transfer. The TWI transfer is suspended until the TWINT Flag is
cleared by software.
When the TWINT Flag is set, the status code in TWSR is used to determine the appro-
priate software action. For each status code, the required software action and details of
the following serial transfer are given in Table 74 to Table 77. Note that the prescaler
bits are masked to zero in these tables.
In the Master Transmitter mode, a number of data bytes are transmitted to a Slave
Receiver (see Figure 86). In order to enter a Master mode, a START condition must be
transmitted. The format of the following address packet determines whether Master
Transmitter or Master Receiver mode is to be entered. If SLA+W is transmitted, MT
mode is entered, if SLA+R is transmitted, MR mode is entered. All the status codes
mentioned in this section assume that the prescaler bits are zero or are masked to zero.
2466J–AVR–10/04

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