ATMEGA16-16PU Atmel, ATMEGA16-16PU Datasheet - Page 234

• Manufacturer Part Number: ATMEGA16-16PU
• Description: IC AVR MCU 16K 16MHZ 5V 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16-16PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Package: 40PDIP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 32
• Interface Type: TWI/SPI/USART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• A/d Inputs: 8-Channel, 10-Bit
• Cpu Speed: 16 MIPS
• Eeprom Memory: 512 Bytes
• Input Output: 32
• Interface: JTAG/SPI/UART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin PDIP
• Programmable Memory: 16K Bytes
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 4.5-5.5 V
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Scanning the Analog
Comparator
234
ATmega16(L)
Figure 120. Boundary-scan Cells for Oscillators and Clock Options
Table 90 summaries the scan registers for the external clock pin XTAL1, Oscillators with
XTAL1/XTAL2 connections as well as 32 kHz Timer Oscillator.
Table 90. Scan Signals for the Oscillators
Notes:
The relevant Comparator signals regarding Boundary-scan are shown in Figure 121.
The Boundary-scan cell from Figure 122 is attached to each of these signals. The sig-
nals are described in Table 91.
The Comparator need not be used for pure connectivity testing, since all analog inputs
are shared with a digital port pin as well.
Enable Signal
EXTCLKEN
OSCON
RCOSCEN
OSC32EN
TOSKON
Previous
From
Cell
ShiftDR
1. Do not enable more than one clock source as main clock at a time.
2. Scanning an Oscillator output gives unpredictable results as there is a frequency drift
3. The clock configuration is programmed by fuses. As a fuse is not changed run-time,
0
1
ClockDR
between the Internal Oscillator and the JTAG TCK clock. If possible, scanning an
external clock is preferred.
the clock configuration is considered fixed for a given application. The user is advised
to scan the same clock option as to be used in the final system. The enable signals
are supported in the scan chain because the system logic can disable clock options
in sleep modes, thereby disconnecting the Oscillator pins from the scan path if not
provided. The INTCAP Fuses are not supported in the scan-chain, so the boundary
scan chain can not make a XTAL Oscillator requiring internal capacitors to run unless
the fuse is correctly programmed.
D
Scanned Clock Line
EXTCLK (XTAL1)
OSCCK
RCCK
OSC32CK
TOSCK
UpdateDR
Q
Next
Cell
To
D
G
Q
EXTEST
0
1
XTAL1/TOSC1
ENABLE
Clock Option
External Clock
External Crystal
External Ceramic
Resonator
External RC
Low Freq. External Crystal
32 kHz Timer Oscillator
(1)(2)(3)
Oscillator
XTAL2/TOSC2
OUTPUT
Previous
From
Cell
ShiftDR
Scanned Clock Line
when not Used
0
1
ClockDR
D
2466J–AVR–10/04
FF1
0
0
1
0
0
Q
Next
Cell
To