ATMEGA16-16PU Atmel, ATMEGA16-16PU Datasheet - Page 348

IC AVR MCU 16K 16MHZ 5V 40DIP

ATMEGA16-16PU

Manufacturer Part Number
ATMEGA16-16PU
Description
IC AVR MCU 16K 16MHZ 5V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA16-16PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
TWI/SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
ATMEGA16x
Core
AVR8
Data Ram Size
1 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
16 MIPS
Eeprom Memory
512 Bytes
Input Output
32
Interface
JTAG/SPI/UART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PDIP
Programmable Memory
16K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
4.5-5.5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA16-16PU
Manufacturer:
Atmel
Quantity:
140
iv
ATmega16(L)
JTAG Interface and On-chip Debug System ................................. 220
IEEE 1149.1 (JTAG) Boundary-scan .............................................. 226
Boot Loader Support – Read-While-Write Self-Programming ..... 246
Memory Programming..................................................................... 259
Electrical Characteristics................................................................ 291
Features............................................................................................................ 220
Overview........................................................................................................... 220
Test Access Port – TAP.................................................................................... 220
TAP Controller .................................................................................................. 222
Using the Boundary-scan Chain ....................................................................... 223
Using the On-chip Debug System .................................................................... 223
On-chip Debug Specific JTAG Instructions ...................................................... 224
On-chip Debug Related Register in I/O Memory .............................................. 225
Using the JTAG Programming Capabilities ...................................................... 225
Bibliography ...................................................................................................... 225
Features............................................................................................................ 226
System Overview.............................................................................................. 226
Data Registers .................................................................................................. 226
Boundary-scan Specific JTAG Instructions ...................................................... 228
Boundary-scan Chain ....................................................................................... 231
ATmega16 Boundary-scan Order..................................................................... 240
Boundary-scan Description Language Files ..................................................... 245
Features............................................................................................................ 246
Application and Boot Loader Flash Sections .................................................... 246
Read-While-Write and no Read-While-Write Flash Sections ........................... 246
Boot Loader Lock Bits....................................................................................... 248
Entering the Boot Loader Program ................................................................... 249
Addressing the Flash during Self-Programming ............................................... 251
Self-Programming the Flash ............................................................................. 252
Program And Data Memory Lock Bits .............................................................. 259
Fuse Bits........................................................................................................... 260
Signature Bytes ................................................................................................ 261
Calibration Byte ................................................................................................ 261
Page Size ......................................................................................................... 262
Parallel Programming Parameters, Pin Mapping, and Commands .................. 262
Parallel Programming ....................................................................................... 265
SPI Serial Downloading .................................................................................... 273
SPI Serial Programming Pin Mapping .............................................................. 273
Programming via the JTAG Interface ............................................................... 278
Absolute Maximum Ratings*............................................................................. 291
DC Characteristics............................................................................................ 291
External Clock Drive Waveforms ...................................................................... 293
2466J–AVR–10/04

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