ATMEGA16-16PU Atmel, ATMEGA16-16PU Datasheet - Page 73

IC AVR MCU 16K 16MHZ 5V 40DIP

ATMEGA16-16PU

Manufacturer Part Number
ATMEGA16-16PU
Description
IC AVR MCU 16K 16MHZ 5V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA16-16PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
TWI/SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
ATMEGA16x
Core
AVR8
Data Ram Size
1 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
16 MIPS
Eeprom Memory
512 Bytes
Input Output
32
Interface
JTAG/SPI/UART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PDIP
Programmable Memory
16K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
4.5-5.5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA16-16PU
Manufacturer:
Atmel
Quantity:
140
Compare Output Mode and
Waveform Generation
2466J–AVR–10/04
Figure 30. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC0) from the
Waveform Generator if either of the COM01:0 bits are set. However, the OC0 pin direc-
tion (input or output) is still controlled by the Data Direction Register (DDR) for the port
pin. The Data Direction Register bit for the OC0 pin (DDR_OC0) must be set as output
before the OC0 value is visible on the pin. The port override function is independent of
the Waveform Generation mode.
The design of the output compare pin logic allows initialization of the OC0 state before
the output is enabled. Note that some COM01:0 bit settings are reserved for certain
modes of operation. See “8-bit Timer/Counter Register Description” on page 81.
The Waveform Generator uses the COM01:0 bits differently in normal, CTC, and PWM
modes. For all modes, setting the COM01:0 = 0 tells the waveform generator that no
action on the OC0 Register is to be performed on the next compare match. For compare
output actions in the non-PWM modes refer to Table 39 on page 82. For fast PWM
mode, refer to Table 40 on page 82, and for phase correct PWM refer to Table 41 on
page 82.
A change of the COM01:0 bits state will have effect at the first compare match after the
bits are written. For non-PWM modes, the action can be forced to have immediate effect
by using the FOC0 strobe bits.
COMn1
COMn0
FOCn
clk
I/O
Waveform
Generator
D
D
D
PORT
DDR
OCn
Q
Q
Q
1
0
ATmega16(L)
OCn
Pin
73

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