ATMEGA16-16PU Atmel, ATMEGA16-16PU Datasheet - Page 33

IC AVR MCU 16K 16MHZ 5V 40DIP

ATMEGA16-16PU

Manufacturer Part Number
ATMEGA16-16PU
Description
IC AVR MCU 16K 16MHZ 5V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA16-16PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
TWI/SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
ATMEGA16x
Core
AVR8
Data Ram Size
1 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
16 MIPS
Eeprom Memory
512 Bytes
Input Output
32
Interface
JTAG/SPI/UART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PDIP
Programmable Memory
16K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
4.5-5.5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA16-16PU
Manufacturer:
Atmel
Quantity:
140
Minimizing Power
Consumption
Analog to Digital Converter
Analog Comparator
Brown-out Detector
Internal Voltage Reference
Watchdog Timer
Port Pins
2466J–AVR–10/04
There are several issues to consider when trying to minimize the power consumption in
an AVR controlled system. In general, sleep modes should be used as much as possi-
ble, and the sleep mode should be selected so that as few as possible of the device’s
functions are operating. All functions not needed should be disabled. In particular, the
following modules may need special consideration when trying to achieve the lowest
possible power consumption.
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should
be disabled before entering any sleep mode. When the ADC is turned off and on again,
the next conversion will be an extended conversion. Refer to “Analog to Digital Con-
verter” on page 202 for details on ADC operation.
When entering Idle mode, the Analog Comparator should be disabled if not used. When
entering ADC Noise Reduction mode, the Analog Comparator should be disabled. In the
other sleep modes, the Analog Comparator is automatically disabled. However, if the
Analog Comparator is set up to use the Internal Voltage Reference as input, the Analog
Comparator should be disabled in all sleep modes. Otherwise, the Internal Voltage Ref-
erence will be enabled, independent of sleep mode. Refer to “Analog Comparator” on
page 199 for details on how to configure the Analog Comparator.
If the Brown-out Detector is not needed in the application, this module should be turned
off. If the Brown-out Detector is enabled by the BODEN Fuse, it will be enabled in all
sleep modes, and hence, always consume power. In the deeper sleep modes, this will
contribute significantly to the total current consumption. Refer to “Brown-out Detection”
on page 38 for details on how to configure the Brown-out Detector.
The Internal Voltage Reference will be enabled when needed by the Brown-out Detec-
tor, the Analog Comparator or the ADC. If these modules are disabled as described in
the sections above, the internal voltage reference will be disabled and it will not be con-
suming power. When turned on again, the user must allow the reference to start up
before the output is used. If the reference is kept on in sleep mode, the output can be
used immediately. Refer to “Internal Voltage Reference” on page 40 for details on the
start-up time.
If the Watchdog Timer is not needed in the application, this module should be turned off.
If the Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence,
always consume power. In the deeper sleep modes, this will contribute significantly to
the total current consumption. Refer to “Watchdog Timer” on page 40 for details on how
to configure the Watchdog Timer.
When entering a sleep mode, all port pins should be configured to use minimum power.
The most important thing is then to ensure that no pins drive resistive loads. In sleep
modes where the both the I/O clock (clk
input buffers of the device will be disabled. This ensures that no power is consumed by
the input logic when not needed. In some cases, the input logic is needed for detecting
wake-up conditions, and it will then be enabled. Refer to the section “Digital Input
Enable and Sleep Modes” on page 52 for details on which pins are enabled. If the input
buffer is enabled and the input signal is left floating or have an analog signal level close
to V
CC
/2, the input buffer will use excessive power.
I/O
) and the ADC clock (clk
ATmega16(L)
ADC
) are stopped, the
33

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