ATMEGA16-16PU Atmel, ATMEGA16-16PU Datasheet - Page 240

• Manufacturer Part Number: ATMEGA16-16PU
• Description: IC AVR MCU 16K 16MHZ 5V 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16-16PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Package: 40PDIP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 32
• Interface Type: TWI/SPI/USART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• A/d Inputs: 8-Channel, 10-Bit
• Cpu Speed: 16 MIPS
• Eeprom Memory: 512 Bytes
• Input Output: 32
• Interface: JTAG/SPI/UART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin PDIP
• Programmable Memory: 16K Bytes
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 4.5-5.5 V
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ATmega16 Boundary-
scan Order
240
ATmega16(L)
Table 94 shows the scan order between TDI and TDO when the Boundary-scan chain is
selected as data path. Bit 0 is the LSB; the first bit scanned in, and the first bit scanned
out. The scan order follows the pin-out order as far as possible. Therefore, the bits of
Port A is scanned in the opposite bit order of the other ports. Exceptions from the rules
are the Scan chains for the analog circuits, which constitute the most significant bits of
the scan chain regardless of which physical pin they are connected to. In Figure 116,
PXn. Data corresponds to FF0, PXn. Control corresponds to FF1, and PXn.
Pullup_enable corresponds to FF2. Bit 2, 3, 4, and 5 of Port C is not in the scan chain,
since these pins constitute the TAP pins when the JTAG is enabled.
Table 94. ATmega16 Boundary-scan Order
Bit Number
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
Signal Name
AC_IDLE
ACO
ACME
ACBG
COMP
PRIVATE_SIGNAL1
ACLK
ACTEN
PRIVATE_SIGNAL2
ADCBGEN
ADCEN
AMPEN
DAC_9
DAC_8
DAC_7
DAC_6
DAC_5
DAC_4
DAC_3
DAC_2
DAC_1
DAC_0
EXTCH
G10
G20
GNDEN
HOLD
IREFEN
MUXEN_7
(1)
(2)
Module
Comparator
ADC
2466J–AVR–10/04