DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 367

• Manufacturer Part Number: DS3184DK
• Description: KIT DEMO FOR DS3184
• Manufacturer: Maxim Integrated Products

Specifications of DS3184DK

• Main Purpose: Telecom, ATM / Packet PHYs
• Utilized Ic / Part: DS3184
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Receive FCS Errored Packet Count (RFPC[15:0]) – Lower 16 bits of 24 bits. Register description
follows next register.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 7 to 0: Receive FCS Errored Packet Count (RFPC[7:0])
Receive FCS Errored Packet Count (RFPC[23:0]) – These 24 bits indicate the number of packets received with a
FCS error. The byte count for these packets is included in the receive aborted byte count register PP.REBCR.
This register is updated via the PMU signal (see Section 10.4.5).
RFPC15
RFPC23
RFPC7
15
15
—
0
7
0
0
7
0
RFPC14
RFPC22
RFPC6
14
14
—
0
6
0
0
6
0
PP.RFPCR1
Packet Processor Receive FCS Errored Packet Count Register 1
(1,3,5,7)D8h
PP.RFPCR2
Packet Processor Receive FCS Errored Packet Count Register 2
(1,3,5,7)DAh
RFPC13
RFPC21
RFPC5
13
13
—
0
5
0
0
5
0
RFPC12
RFPC20
RFPC4
12
12
—
0
0
0
0
4
4
367
RFPC11
RFPC19
RFPC3
11
11
—
0
3
0
0
3
0
RFPC10
RFPC18
RFPC2
10
10
—
0
2
0
0
2
0
RFPC17
RFPC9
RFPC1
—
9
0
1
0
9
0
1
0
RFPC16
RFPC8
RFPC0
—
8
0
0
0
8
0
0
0