DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 356

• Manufacturer Part Number: DS3184DK
• Description: KIT DEMO FOR DS3184
• Manufacturer: Maxim Integrated Products

Specifications of DS3184DK

• Main Purpose: Telecom, ATM / Packet PHYs
• Utilized Ic / Part: DS3184
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 7 to 0: Receive Filtered Cell Count (RFCC[23:16]) - Upper 8 bits of Register.
Receive Filtered Cell Count (RFCC[23:0]) – These 24 bits indicate the number of cells that were discarded during
the cell filtering processes (idle, unassigned, and/or invalid). If all cell filtering is disabled, this count will be zero.
Cells included in this count will not be included in any other count. This register is updated via the PMU signal (see
Section 10.4.5).
RFCC23
15
—
0
7
0
RFCC22
14
—
CP.RFCCR2
Cell Processor Receive Filtered Idle/Unassigned/Invalid Cell Count Register #2
(1,3,5,7)E6h
0
6
0
RFCC21
13
—
0
5
0
RFCC20
12
—
0
0
4
356
RFCC19
11
—
0
3
0
RFCC18
10
—
0
2
0
RFCC17
—
9
0
1
0
RFCC16
—
8
0
0
0