DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 275

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DS3184DK

Manufacturer Part Number
DS3184DK
Description
KIT DEMO FOR DS3184
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3184DK

Main Purpose
Telecom, ATM / Packet PHYs
Utilized Ic / Part
DS3184
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 7 to 0: Receive Trail Trace Identifier Data (RTD[7:0]) – These eight bits are the receive trail trace identifier
data. The receive trail trace identifier address will be incremented whenever these bits are read (when byte Fh is
read, the address will return to 0h).
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 7 to 0: Expected Trail Trace Identifier Data (ETD[7:0]) – These eight bits are the expected trail trace
identifier data. The expected trail trace identifier address will be incremented whenever these bits are read or
written (when byte Fh is read or written, the address will return to 0h).
RTD7
ETD7
15
15
0
7
0
0
7
0
RTD6
ETD6
14
14
0
6
0
0
6
0
TT.RIR
Trail Trace Receive Identifier Register
(0,2,4,6)FCh
TT.EIR
Trail Trace Expected Identifier Register
(0,2,4,6)FEh
RTD5
ETD5
13
13
0
5
0
0
5
0
RTD4
ETD4
12
12
0
0
0
0
4
4
275
RTD3
ETD3
11
11
0
3
0
0
3
0
RTD2
ETD2
10
10
0
2
0
0
2
0
RTD1
ETD1
9
0
1
0
9
0
1
0
RTD0
ETD0
8
0
0
0
8
0
0
0

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