DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 361

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DS3184DK

Manufacturer Part Number
DS3184DK
Description
KIT DEMO FOR DS3184
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3184DK

Main Purpose
Telecom, ATM / Packet PHYs
Utilized Ic / Part
DS3184
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Transmit Byte Count (TBC[15:0]) – Lower 16 bits of 32 bits. Register description follows next
register.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Transmit Byte Count (TBC[31:16]) - Upper 16 bits of 32 bits.
Transmit Byte Count (TBC[31:0]) – These 32 bits indicate the number of packet bytes inserted in the outgoing
data stream. This register is updated via the PMU signal (see Section 10.4.5).
TBC15
TBC31
TBC23
TBC7
15
15
0
7
0
0
7
0
TBC14
TBC30
TBC22
TBC6
14
14
0
6
0
0
6
0
PP.TBCR1
Packet Processor Transmit Byte Count Register 1
(1,3,5,7)B8h
PP.TBCR2
Packet Processor Transmit Byte Count Register 2
(1,3,5,7)BAh
TBC13
TBC29
TBC21
TBC5
13
13
0
5
0
0
5
0
TBC12
TBC28
TBC20
TBC4
12
12
0
0
0
0
4
4
361
TBC11
TBC27
TBC19
TBC3
11
11
0
3
0
0
3
0
TBC10
TBC26
TBC18
TBC2
10
10
0
2
0
0
2
0
TBC25
TBC17
TBC9
TBC1
9
0
1
0
9
0
1
0
TBC24
TBC16
TBC8
TBC0
8
0
0
0
8
0
0
0

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