DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 128

• Manufacturer Part Number: DS3184DK
• Description: KIT DEMO FOR DS3184
• Manufacturer: Maxim Integrated Products

Specifications of DS3184DK

• Main Purpose: Telecom, ATM / Packet PHYs
• Utilized Ic / Part: DS3184
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

10.5.11 Mapping Modes
Cells and packets are mapped into various internally generated frame structures or mapped with no framing or
mapped into an externally generated frame structure. When ATM cells are mapped into an internally generated
frame structure they are either directly mapped into a DS3 or E3 frame or they are mapped into a PLCP frame and
then the PLCP frame is mapped into a DS3 or E3 frame. ATM cells are always delineated using bit-by-bit HEC
searching except when byte aligned OHM modes are used, then HEC is searched for byte-by-byte. HDLC packets
are always use the bit stuffing protocol searching bit-by-bit except when byte aligned OHM modes are used, then
they use the byte stuffing protocol. PLCP framing is always searched for bit-by-bit.
The following sections give examples of the major framed mapping configurations:
10.5.11.1 DS3 C-Bit or DS3 M23 (with C-Bit Generation) Direct and PLCP Mapping
For direct mapping into DS3 C-bit and DS3 M23 (with C-bit generation) frames, ATM cells are nibble aligned or bit
aligned, HDLC packets are always bit aligned. For PLCP mapping into DS3 C-bit and DS3 M23 (with C-bit
generation) frames, the PLCP frame is always nibble aligned. The ATM cell nibble/bit alignment is controlled with
the NAD bit in the PORT.CR1 register.
Figure 10-13. DS3 C-Bit or DS3 M23 (with C-Bit Generation) Frame
In DS3 PLCP framing, the ATM cell is always cell aligned into the PLCP frame, HDLC packets cannot be mapped
into PLCP frames. The DS3 PLCP frame can only be mapped into a DS3 C-bit frame or DS3 M23 (with generated
C-bits) frame. The NAD control bit is ignored.
M
M
M
X
X
P
P
1
2
1
2
1
2
3
bits
84
F
F
F
F
F
F
F
11
21
31
41
51
61
71
bits
84
C
C
C
C
C
C
C
11
21
31
41
51
61
71
bits
84
F
F
F
F
F
F
F
12
22
32
42
52
62
72
bits
84
680 Bits
C
C
C
C
C
C
C
12
22
32
42
52
62
72
bits
128
84
F
F
F
F
F
F
F
13
23
33
43
53
63
73
bits
84
C
C
C
C
C
C
C
13
23
33
43
53
63
73
bits
84
F
F
F
F
F
F
F
14
24
34
44
54
64
74
bits
84
7 Sub-
Frames