DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 349

• Manufacturer Part Number: DS3184DK
• Description: KIT DEMO FOR DS3184
• Manufacturer: Maxim Integrated Products

Specifications of DS3184DK

• Main Purpose: Telecom, ATM / Packet PHYs
• Utilized Ic / Part: DS3184
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Bit #
Name
Bit 11: Out Of Sync (OOS) – This read-only bit indicates that a DSS Out Of Sync (OOS) state exists. DSS OOS
occurs when the DSS Scrambler Synchronization state machine is in the "Load" or "Verify" state, and DSS
scrambling has been enabled.
Bit 9: Out Of Cell Delineation (OCD) – This read-only bit indicates that an Out of Cell Delineation condition (OCD)
exists. When DSS scrambling is disabled, OCD occurs when the HEC Error Monitoring state machine is in the
"OCD" state. When DSS scrambling is enable, OCD occurs when the DSS OCD Detection state machine is in the
"OCD" state.
Bit 8: Loss Of Cell Delineation (LCD) – This read-only bit indicate that a Loss of Cell Delineation state exists.
LCD occurs when OCD persists for the period programmed in the LCD threshold control register RLTC.
Bit 2: Receive Errored Header Cell Count (RECC) – This read-only bit indicates that the receive errored header
cell count is non-zero.
Bit 1: Receive Header Pattern Cell Count (RHPC) – This read-only bit indicates that the receive header pattern
comparison cell count is non-zero.
Bit 0: Receive Corrected Cell Count (RCHC) – This read-only bit indicates that the receive corrected header cell
count is non-zero.
15
—
—
7
14
—
—
6
CP.RSR
Cell Processor Receive Status Register
(1,3,5,7)CEh
13
—
—
5
12
—
—
4
349
OOS
11
—
3
RECC
10
—
2
RHPC
OCD
9
1
RCHC
LCD
8
0