DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 14

no-image

DS3184DK

Manufacturer Part Number
DS3184DK
Description
KIT DEMO FOR DS3184
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3184DK

Main Purpose
Telecom, ATM / Packet PHYs
Utilized Ic / Part
DS3184
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
1
Figure 1-1
the functional block diagram of one channel ATM/Packet PHY.
Figure 1-1. LIU External Connections for a DS3/E3/STS-1 Port of a DS318x Device
Figure 1-2. DS318x Functional Block Diagram
TOHMOn/
RLCLKn
RNEGn/
ROHMIn
TLCLKn
RPOSn/
TPOSn/
TNEGn/
RLCVn/
RDATn
TDATn
RXPn
RXNn
TXNn
TXPn
BLOCK DIAGRAMS
Clock Rate
Receive
Transmit
DS3/E3
shows the external components required at each LIU interface for proper operation.
DS3/E3
Adapter
LIU
LIU
Transmit
Receive
DS318x
Decoder
Encoder
B3ZS/
HDB3
HDB3
B3ZS/
1:2ct
1:2ct
TUA1
TAIS
IEEE P1149.1
JTAG Test
Access Port
FEAC
DS3 / E3
DS3 / E3
Receive
Framer
Transmit
Formatter
Buffer
Trace
Trail
330Ω
(1%)
330Ω
(1%)
Each T3/E3 LIU
HDLC
TXP
TXN
RXP
RXN
f
GEN
UA1
14
TX FRAC/
PLCP
RX FRAC/
PLCP
VDD
VDD
VDD
VSS
VSS
VSS
0.01uF
0.01uF
0.01uF
Rx Packet
Processor
Processor
RX BERT
Processor
Processor
TX BERT
Tx Packet
Rx Cell
Tx Cell
Microprocessor
0.1uF
0.1uF
0.1uF
Interface
1uF
1uF
1uF
Ground
Plane
FIFO
Tx
FIFO
Rx
3.3V
Power
Plane
n = port # (1-4)
Figure 1-2
/RSX
RDXA[4:2]
RSOX
REOP
TSCLK
TADR[4:0]
TDATA[31:0]
TPRTY
TDXA[4:2]
TSOX
TSPA
TEOP
TSX
TMOD[1:0]
TERR
RSCLK
RADR[4:0]
RDATA[31:0]
RPRTY
REN
RDXA[1]/RPXA
RVAL
RMOD[1:0]
RERR
TDXA[1]/TPXA
TEN
shows

Related parts for DS3184DK