NNDK-MOD5272-KIT NetBurner Inc, NNDK-MOD5272-KIT Datasheet - Page 225

• Manufacturer Part Number: NNDK-MOD5272-KIT
• Description: KIT DEVELOP NETWORK FOR MOD5272
• Manufacturer: NetBurner Inc
• Series: ColdFire®r

Specifications of NNDK-MOD5272-KIT

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: MOD5272
• Primary Attributes: *
• Secondary Attributes: *
• Processor To Be Evaluated: MOD5272
• Interface Type: RS-232, RS-485, USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 528-1001

MOTOROLA
Chapter 11
Ethernet Module
This chapter begins with a feature-set overview, a functional block diagram, and transceiver
connection information for both MII and seven-wire serial interfaces. The chapter
concludes with detailed descriptions of operation and the programming model.
11.1 Overview
The MCF5272’s integrated fast Ethernet media access controller (MAC) performs the full
set of IEEE 802.3/Ethernet CSMA/CD media access control and channel interface
functions. It requires an external interface adaptor and transceiver function to complete the
interface to the media.
11.1.1 Features
The fast Ethernet controller (FEC) incorporates the following features:
• Full compliance with the IEEE 802.3 standard
• Support for three different physical interfaces:
• Half-duplex 100-Mbps operation at system clock frequency ≥ 50 MHz
• 448 bytes total on-chip transmit and receive FIFO memory to support a range of bus
• Retransmission from transmit FIFO following a collision, no processor bus used
• Automatic internal flushing of the receive FIFO for runts and collisions with no
— 100 Mbps 802.3 media independent interface (MII)
— 10 Mbps 802.3 MII
— 10 Mbps seven-wire interface
latencies
Note: the total FIFO size is 448 bytes. It is not intended to hold entire frames but
only to compensate for external bus latency. The FIFO can be partitioned on any
32-bit boundary between receive and transmit, for example, 32 x 56 receive and
32 x 56 transmit.
processor bus use
Chapter 11. Ethernet Module
11-1