NNDK-MOD5272-KIT NetBurner Inc, NNDK-MOD5272-KIT Datasheet - Page 123
NNDK-MOD5272-KIT
Manufacturer Part Number
NNDK-MOD5272-KIT
Description
KIT DEVELOP NETWORK FOR MOD5272
Manufacturer
NetBurner Inc
Series
ColdFire®r
Datasheets
1.MOD5272-100IR.pdf
(2 pages)
2.MOD5272-100IR.pdf
(550 pages)
3.NNDK-MOD5282-KIT.pdf
(2 pages)
Specifications of NNDK-MOD5272-KIT
Main Purpose
*
Embedded
*
Utilized Ic / Part
MOD5272
Primary Attributes
*
Secondary Attributes
*
Processor To Be Evaluated
MOD5272
Interface Type
RS-232, RS-485, USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
528-1001
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MOTOROLA
Chapter 5
Debug Support
This chapter describes the Revision A enhanced hardware debug support in the MCF5272.
5.1 Overview
The debug module is shown in Figure 5-1.
Debug support is divided into three areas:
• Real-time trace support—The ability to determine the dynamic execution path
• Background debug mode (BDM)—Provides low-level debugging in the ColdFire
• Real-time debug support—BDM requires the processor to be halted, which many
through an application is fundamental for debugging. The ColdFire solution
implements an 8-bit parallel output bus that reports processor execution status and
data to an external emulator system. See Section 5.3, “Real-Time Trace Support.”
processor complex. In BDM, the processor complex is halted and a variety of
commands can be sent to the processor to access memory and registers. The external
emulator uses a three-pin, serial, full-duplex channel. See Section 5.5, “Background
Debug Mode (BDM),” and Section 5.4, “Programming Model.”
real-time embedded applications cannot do. Debug interrupts let real-time systems
execute a unique service routine that can quickly save the contents of key registers
and variables and return the system to normal operation. External development
systems can access saved data because the hardware supports concurrent operation
of the processor and BDM-initiated commands. See Section 5.6, “Real-Time Debug
Support.”
Control
BKPT
Figure 5-1. Processor/Debug Module Interface
PST[3:0], DDATA[3:0]
ColdFire CPU Core
Debug Module
Trace Port
PSTCLK
Chapter 5. Debug Support
Communication Port
DSCLK, DSI, DSO
High-speed
local bus
5-1
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