HD6432646 Hitachi, HD6432646 Datasheet - Page 785
HD6432646
Manufacturer Part Number
HD6432646
Description
(HD64F264x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432646.pdf
(1155 pages)
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22.13
1. When making a transition to sub-active mode or watch mode, set the DTC to enter module stop
2. The on-chip peripheral modules (DTC and TPU) which halt operation in sub-active mode
mode (write 1 to the relevant bits in MSTPCR), and then read the relevant bits to confirm that
they are set to 1 before mode transition. Do not clear module stop mode (write 0 to the relevant
bits in MSTPCR) until a transition from sub-active mode to high-speed mode or medium-speed
mode has been performed.
If a DTC activation source occurs in sub-active mode, the DTC will be activated only after
module stop mode has been cleared and high-speed mode or medium-speed mode has been
entered.
cannot clear an interrupt in sub-active mode. Therefore, if a transition is made to sub-active
mode while an interrupt is requested, the CPU interrupt source cannot be cleared. Disable the
interrupts of each on-chip peripheral module before executing a SLEEP instruction to enter
sub-active mode or watch mode.
Usage Notes
751
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